Steffen Kunze

According to our database1, Steffen Kunze authored at least 7 papers between 2008 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2014
10.7 A 105GOPS 36mm<sup>2</sup> heterogeneous SDR MPSoC with energy-aware dynamic scheduling and iterative detection-decoding for 4G in 65nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
On the design and implementation of multi-mode channel decoders.
PhD thesis, 2013

2012
A 335Mb/s 3.9mm<sup>2</sup> 65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
Combining LDPC, turbo and Viterbi decoders: Benefits and costs.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

2009
ASIP Decoder Architecture for Convolutional and LDPC Codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
A dual-core programmable decoder for LDPC convolutional codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008


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