Steffen Christgau
Orcid: 0000-0002-8702-8422
According to our database1,
Steffen Christgau
authored at least 15 papers
between 2011 and 2024.
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2024
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Bibliography
2024
CoRR, 2024
2023
Enabling Communication with FPGA-based Network-attached Accelerators for HPC Workloads.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023
2022
A First Step towards Support for MPI Partitioned Communication on SYCL-programmed FPGAs.
Proceedings of the IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, 2022
2020
Leveraging a Heterogeneous Memory System for a Legacy Fortran Code: The Interplay of Storage Class Memory, DRAM and OS.
Proceedings of the IEEE/ACM Workshop on Memory Centric High Performance Computing, 2020
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020
2017
One-sided communication on a non-cache-coherent many-core architecture (Einseitige Kommunikation auf einer nicht-cache-kohärenten Vielkern-Prozessorarchitektur)
PhD thesis, 2017
Exploring one-sided communication and synchronization on a non-cache-coherent many-core architecture.
Concurr. Comput. Pract. Exp., 2017
2016
Proceedings of the Sixth International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing, 2016
Proceedings of the 7th International Workshop on Programming Models and Applications for Multicores and Manycores, 2016
Proceedings of the 3rd ACM SIGPLAN International Workshop on Libraries, 2016
2014
Proceedings of the ARCS 2014, 2014
2012
Proceedings of the 6th Many-core Applications Research Community (MARC) Symposium. Proceedings of the 6th MARC Symposium, 2012
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012
2011
Proceedings of the 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, 2011
Integrated Temporal Planning, Module Selection and Placement of Tasks for Dynamic Networks-on-Chip.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011