Stefan Eichenberger

According to our database, Stefan Eichenberger authored at least 24 papers between 2002 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2013

Diagnosis of Interconnect Full Open Defects in the Presence of Gate Leakage Currents.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2011

Gate Leakage Impact on Full Open Defects in Interconnect Lines.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

IEEE Trans. Very Large Scale Integr. Syst., 2011

Diagnosis of Interconnect Full Open Defects in the Presence of Fan-Out.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

2010

Impact of Temperature on Test Quality.

Lavanya Jagan, Camelia Hora, Bram Kruseman, Stefan Eichenberger, Ananta K. Majhi, V. Kamakoti

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

Defect-oriented cell-internal testing.

Friedrich Hapke, Wilfried Redemund, Jürgen Schlöffel, Rene Krenz-Baath, Andreas Glowatz, Michael Wittke, Hamidreza Hashempour, Stefan Eichenberger

Proceedings of the 2011 IEEE International Test Conference, 2010

Diagnosis of full open defects in interconnect lines with fan-out.

Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

Proceedings of the 15th European Test Symposium, 2010

2009

Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs.

Friedrich Hapke, Rene Krenz-Baath, Andreas Glowatz, Jürgen Schlöffel, Hamidreza Hashempour, Stefan Eichenberger, Camelia Hora, Dan Adolfsson

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

Full Open Defects in Nanometric CMOS.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

Time-dependent Behaviour of Full Open Defects in Interconnect Lines.

Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

Proceedings of the 2008 IEEE International Test Conference, 2008

Towards a World Without Test Escapes: The Use of Volume Diagnosis to Improve Test Quality.

Stefan Eichenberger, Jeroen Geuzebroek, Camelia Hora, Bram Kruseman, Ananta K. Majhi

Proceedings of the 2008 IEEE International Test Conference, 2008

2007

Modeling Power Supply Noise in Delay Testing.

Jing Wang, Duncan M. Hank Walker, Xiang Lu, Ananta K. Majhi, Bram Kruseman, Guido Gronthoud, Luis Elvira Villagra, Paul J. A. M. van de Wiel, Stefan Eichenberger

IEEE Des. Test Comput., 2007

Diagnosis of Full Open Defects in Interconnecting Lines.

Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

2006

Power Supply Noise in Delay Testing.

Jing Wang, D. M. H. Walker, Ananta K. Majhi, Bram Kruseman, Guido Gronthoud, Luis Elvira Villagra, Paul van de Wiel, Stefan Eichenberger

Proceedings of the 2006 IEEE International Test Conference, 2006

2005

Memory testing improvements through different stress conditions.

Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen

Proceedings of the 31st European Solid-State Circuits Conference, 2005

Memory Testing Under Different Stress Conditions: An Industrial Evaluation.

Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen

Proceedings of the 2005 Design, 2005

2004

ITC 2003 Roundtable: Design for Manufacturability.

Rob Aitken, Stefan Eichenberger, Gary Maier, Sandip Kundu, Hank Walker

IEEE Des. Test Comput., 2004

Delay Defect Screening using Process Monitor Structures.

Subhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

Systematic Defects in Deep Sub-Micron Technologies.

Bram Kruseman, Ananta K. Majhi, Camelia Hora, Stefan Eichenberger, Johan Meirlevede

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

On Hazard-free Patterns for Fine-delay Fault Testing.

Bram Kruseman, Ananta K. Majhi, Guido Gronthoud, Stefan Eichenberger

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003

On a Statistical Fault Diagnosis Approach Enabling Fast Yield Ramp-Up.

Camelia Hora, Rene Segers, Stefan Eichenberger, Maurice Lousberg

J. Electron. Test., 2003

Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model.

Ananta K. Majhi, Guido Gronthoud, Camelia Hora, Maurice Lousberg, Pop Valer, Stefan Eichenberger

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Design for Manufacturability - or the meaning of 'subtle'.

Stefan Eichenberger

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002

An Effective Diagnosis Method to Support Yield Improvement.

Camelia Hora, Rene Segers, Stefan Eichenberger, Maurice Lousberg

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002