Stefan Decoster
According to our database1,
Stefan Decoster
authored at least 3 papers
between 2022 and 2024.
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Bibliography
2024
Mitigating Line-Break Defectivity with a Sandwiched TiN or W Layer for Metal Pitch 18 NM Aspect Ratio 6 Semi-Damascene Interconnects.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
Towards low damage and fab-compatible top-contacts in MX2 transistors using a combined synchronous pulse atomic layer etch and wet-chemical etch approach.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
First demonstration of Two Metal Level Semi-damascene Interconnects with Fully Self-aligned Vias at 18MP.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022