Stanislaw Deniziak

According to our database, Stanislaw Deniziak authored at least 58 papers between 1994 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

RTLS Systems Designing Approach Using Beacon Technology.

Miroslaw Plaza, Marcin Kozlowski, Michal Lucki, Radoslaw Belka, Stanislaw Deniziak, Jiri Vodrazka

IEEE Internet Things J., April, 2024

Automated Classification of Virtual Reality User Motions Using a Motion Atlas and Machine Learning Approach.

Pawel Pieta, Hubert Jegierski, Pawel Babiuch, Maciej Jegierski, Miroslaw Plaza, Grzegorz Lukawski, Stanislaw Deniziak, Artur Jasinski, Jacek Opalka, Pawel Wegrzyn, Magdalena Igras-Cybulska, Adrian Lapczynski

IEEE Access, 2024

MUN: an AI-powered multiplayer networking solution for VR games.

Pawel Babiuch, Adrian Lapczynski, Hubert Jegierski, Maciej Jegierski, Rafal Salamon, Barbara Kolber-Bugajska, Mirosaw Paza, Stanislaw Deniziak, Pawel Pieta, Grzegorz Lukawski, Artur Jasinski, Jacek Opalka, Alicia Marmon, Kamil Kwiatkowski, Artur Cybulski, Magdalena Igras-Cybulska, Pawel Wegrzyn

Proceedings of the IEEE Conference on Virtual Reality and 3D User Interfaces Abstracts and Workshops, 2024

Supporting Unity Developers with an AI-Powered Asset: Insights from an Exploratory User Study on Multiplayer Game Development Magdalena Igras-Cybulska.

Magdalena Igras-Cybulska, Barbara Kolber-Bugajska, Rafal Salamon, Pawel Babiuch, Hubert Jegierski, Maciej Jegierski, Adrian Lapczynski, Alicja Marmon, Kamil Kwiatkowski, Artur Cybulski, Miroslaw Plaza, Grzegorz Lukawski, Stanislaw Deniziak, Pawel Pieta, Artur Jasinski, Jacek Opalka, Pawel Wegrzyn

Proceedings of the 1st International Workshop on Designing and Building Hybrid Human-AI Systems co-located with 17th International Conference on Advanced Visual Interfaces (AVI 2024), 2024

2023

Real-time Communication Model for IoT Systems.

Stanislaw Deniziak, Miroslaw Plaza, Lukasz Arcab

Proceedings of the 18th Conference on Computer Science and Intelligence Systems, 2023

Web Based Application for Probability Job Scheduling.

Tomasz Michno, Roman Stanislaw Deniziak, Aleksandra Michno

Proceedings of the Distributed Computing and Artificial Intelligence, 2023

2022

A method for improving bot effectiveness by recognising implicit customer intent in contact centre conversations.

Lukasz Pawlik, Miroslaw Plaza, Stanislaw Deniziak, Ewa Boksa

Speech Commun., 2022

Multimodal Network Based Graphs of Primitives Storage Concept for Web Mining CBIR.

Tomasz Michno, Roman Stanislaw Deniziak

Proceedings of the Distributed Computing and Artificial Intelligence, 2022

2021

DECOLib: A library of components for DECOmposition of discrete functions.

Stanislaw Deniziak, Mariusz Wisniewski

SoftwareX, 2021

BLE-Based Indoor Tracking System with Overlapping-Resistant IoT Solution for Tourism Applications.

Radoslaw Belka, Roman Stanislaw Deniziak, Grzegorz Lukawski, Pawel Pieta

Sensors, 2021

Call Transcription Methodology for Contact Center Systems.

Miroslaw Plaza, Lukasz Pawlik, Stanislaw Deniziak

IEEE Access, 2021

Highly Scalable Distributed Architecture for NoSQL Datastore Supporting Strong Consistency.

Adam Krechowicz, Stanislaw Deniziak, Grzegorz Lukawski

IEEE Access, 2021

2020

Synthesis of Self-Adaptable Software for Multicore Embedded Systems.

Stanislaw Deniziak, Leszek Ciopinski

Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

Scheduling of Distributed Applications in HHPCaaS Clouds for Internet of Things.

Stanislaw Deniziak, Slawomir Bak

Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

2019

Co-synthesis of contention-free energy-efficient NOC-based real time embedded systems.

Stanislaw Deniziak, Robert Tomaszewski

J. Syst. Archit., 2019

Graph of Primitives Matching Problem in the World Wide Web CBIR Searching Using Query by Approximate Shapes.

Roman Stanislaw Deniziak, Tomasz Michno

Proceedings of the Distributed Computing and Artificial Intelligence, 2019

2018

BMB synthesis of binary functions using symbolic functional decomposition for LUT-based FPGAs.

Mariusz Wisniewski, Stanislaw Deniziak

J. Parallel Distributed Comput., 2018

Codesign of energy and resource efficient contention-free Network-on Chip for real-time embedded systems.

Stanislaw Deniziak, Robert Tomaszewski

Proceedings of the 11th International Workshop on Network on Chip Architectures, 2018

Query by Approximate Shapes Image Retrieval with improved object sketch extraction algorithm.

Stanislaw Deniziak, Tomasz Michno

Proceedings of the 2018 Federated Conference on Computer Science and Information Systems, 2018

Hierarchical Clustering in Scalable Distributed Two-Layer Datastore for Big Data as a Service.

Adam Krechowicz, Stanislaw Deniziak

Proceedings of the Sixth International Conference on Enterprise Systems, 2018

World Wide Web CBIR Searching Using Query by Approximate Shapes.

Roman Stanislaw Deniziak, Tomasz Michno

Proceedings of the Distributed Computing and Artificial Intelligence, 2018

2017

Business Intelligence Platform for Big Data based on Scalable Distributed Two-Layer Data Store.

Adam Krechowicz, Stanislaw Deniziak

Proceedings of the Communication Papers of the 2017 Federated Conference on Computer Science and Information Systems, 2017

New Content Based Image Retrieval database structure using Query by Approximate Shapes.

Stanislaw Deniziak, Tomasz Michno

Proceedings of the 2017 Federated Conference on Computer Science and Information Systems, 2017

2016

Content Based Image Retrieval Using Modified Scalable Distributed Two-Layer Data Structure.

Stanislaw Deniziak, Tomasz Michno, Adam Krechowicz

Int. J. Comput. Sci. Appl., 2016

Content Based Image Retrieval using Query by Approximate Shape.

Stanislaw Deniziak, Tomasz Michno

Proceedings of the 2016 Federated Conference on Computer Science and Information Systems, 2016

Synthesis of Multivalued Logical Networks for FPGA Implementations.

Stanislaw Deniziak, Mariusz Wisniewski, Karol Wieczorek

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015

Design of Real-Time Computer-Based Systems Using Developmental Genetic Programming.

Stanislaw Deniziak, Leszek Ciopinski, Grzegorz Pawinski

Proceedings of the Handbook of Genetic Programming Applications, 2015

Symbolic Functional Decomposition of Multivalued Functions.

Stanislaw Deniziak, Mariusz Wisniewski

J. Multiple Valued Log. Soft Comput., 2015

Scalable Distributed Two-Layer Block Based Datastore.

Adam Krechowicz, Stanislaw Deniziak, Mariusz Bedla, Arkadiusz Chrobot, Grzegorz Lukawski

Proceedings of the Parallel Processing and Applied Mathematics, 2015

Query-by-Shape interface for Content Based Image Retrieval.

Stanislaw Deniziak, Tomasz Michno

Proceedings of the 8th International Conference on Human System Interaction, 2015

The scalable distributed two-layer Content Based Image Retrieval data store.

Stanislaw Deniziak, Tomasz Michno, Adam Krechowicz

Proceedings of the 2015 Federated Conference on Computer Science and Information Systems, 2015

Synthesis of power aware adaptive schedulers for embedded systems using developmental genetic programming.

Stanislaw Deniziak, Leszek Ciopinski

Proceedings of the 2015 Federated Conference on Computer Science and Information Systems, 2015

Preserving Data Consistency in Scalable Distributed Two Layer Data Structures.

Adam Krechowicz, Stanislaw Deniziak, Grzegorz Lukawski, Mariusz Bedla

Proceedings of the Beyond Databases, Architectures and Structures, 2015

Query by Shape for Image Retrieval from Multimedia Databases.

Stanislaw Deniziak, Tomasz Michno

Proceedings of the Beyond Databases, Architectures and Structures, 2015

2014

Cost Optimization of Real-Time Cloud Applications Using Developmental Genetic Programming.

Stanislaw Deniziak, Leszek Ciopinski, Grzegorz Pawinski, Karol Wieczorek, Slawomir Bak

Proceedings of the 7th IEEE/ACM International Conference on Utility and Cloud Computing, 2014

An Application of Developmental Genetic Programming for Automatic Creation of Supervisors of Multi-task Real-Time Object-Oriented Systems.

Krzysztof Sapiecha, Leszek Ciopinski, Stanislaw Deniziak

Proceedings of the 2014 Federated Conference on Computer Science and Information Systems, 2014

Synthesis of Real Time Distributed Applications for Cloud Computing.

Slawomir Bak, Stanislaw Deniziak

Proceedings of the 2014 Federated Conference on Computer Science and Information Systems, 2014

2012

Aspect-oriented SystemC-based performance evaluation of real-time embedded software.

Stanislaw Deniziak, Konrad Kurczyna

Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012

Synthesis of Real-Time Applications for Internet of Things.

Slawomir Bak, Radoslaw Czarnecki, Stanislaw Deniziak

Proceedings of the Pervasive Computing and the Networked World, 2012

Evolutionary Optimization of Decomposition Strategies for Logical Functions.

Stanislaw Deniziak, Karol Wieczorek

Proceedings of the Swarm and Evolutionary Computation, 2012

2011

Parallel Approach to the Functional Decomposition of Logical Functions Using Developmental Genetic Programming.

Stanislaw Deniziak, Karol Wieczorek

Proceedings of the Parallel Processing and Applied Mathematics, 2011

2010

Contention-free and application-specific network-on-chip generation for embedded systems.

Robert Tomaszewski, Stanislaw Deniziak

Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

2009

A symbolic RTL synthesis for LUT-based FPGAs.

Stanislaw Deniziak, Mariusz Wisniewski

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

Contention-avoiding custom topology generation for network-on-chip.

Stanislaw Deniziak, Robert Tomaszewski

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008

Hardware/Software Co-synthesis of Distributed Embedded Systems Using Genetic Programming.

Stanislaw Deniziak, Adam Gorski

Proceedings of the Evolvable Systems: From Biology to Hardware, 2008

An symbolic decomposition of functions with multi-valued inputs and outputs for FPGA-based implementation.

Stanislaw Deniziak, Mariusz Wisniewski

Proceedings of the FPL 2008, 2008

An Integrated Input Encoding and Symbolic Functional Decomposition for LUT-Based FPGAs.

Stanislaw Deniziak, Mariusz Wisniewski

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

Rapid Prototyping of NoC Architectures from a SystemC Specification.

Stanislaw Deniziak, Robert Tomaszewski

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007

Resource Constrained Co-synthesis of Self-reconfigurable SOPCs.

Radoslaw Czarnecki, Stanislaw Deniziak

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2004

Validation of reactive embedded systems against specification requirements.

Joanna Strug, Stanislaw Deniziak, Krzysztof Sapiecha

Ann. UMCS Informatica, 2004

RT-level fast fault simulator.

Stanislaw Deniziak, Krzysztof Sapiecha

Ann. UMCS Informatica, 2004

Fast high-level fault simulator.

Stanislaw Deniziak, Krzysztof Sapiecha

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Validation of Reactive Embedded Systems against Temporal Requirements.

Joanna Strug, Stanislaw Deniziak, Krzysztof Sapiecha

Proceedings of the 11th IEEE International Conference on the Engineering of Computer-Based Systems (ECBS 2004), 2004

2003

An Iterative Improvement Co-synthesis Algorithm for Optimization of SOPC Architecture with Dynamically Reconfigurable FPGAs.

Radoslaw Czarnecki, Stanislaw Deniziak, Krzysztof Sapiecha

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2001

Developing a High-Level Fault Simulation Standard.

Stanislaw Deniziak, Krzysztof Sapiecha

Computer, 2001

1999

High Level Testbench Generation for VHDL Models.

Stanislaw Deniziak, Krzysztof Sapiecha

Proceedings of the 6th Symposium on Engineering of Computer-Based Systems (ECBS '99), 1999

1998

HTDD based parallel fault simulator.

Joanna Sapiecha, Krzysztof Sapiecha, Stanislaw Deniziak

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1994

Cupland - A Behavioral Level Description Compiler for Designing of PLD/EPLD-Based Systems.

Stanislaw Deniziak, Krzysztof Sapiecha

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994