Ssu-Wei Huang

According to our database, Ssu-Wei Huang authored at least 2 papers between 2018 and 2020.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2020

A Slew Rate Enhanced 2 x VDD I/O Buffer With Precharge Timing Technique.

Tzung-Je Lee, Ssu-Wei Huang, Chua-Chin Wang

IEEE Trans. Circuits Syst., 2020

2018

40-nm 2×VDD Digital Output Buffer Design With DDR4-Compliant Slew Rate.

Chua-Chin Wang, Zong-You Hou, Ssu-Wei Huang

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018