Srobona Mitra

According to our database, Srobona Mitra authored at least 9 papers between 1997 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

Counterexample Ranking Using Mined Invariants.

Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta, Harish Kumar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Formal Guarantees for Localized Bug Fixes.

Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta, Priyankar Ghosh, Harish Kumar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2012

Verification by parts: reusing component invariant checking results.

Srobona Mitra, Priyankar Ghosh, Pallab Dasgupta

IET Comput. Digit. Tech., 2012

Formal methods for ranking counterexamples through assumption mining.

Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011

Backward Reasoning with Formal Properties: A Methodology for Bug Isolation on Simulation Traces.

Anvesh Komuravelli, Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010

Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent.

Aritra Hazra, Srobona Mitra, Pallab Dasgupta, Ajit Pal, Debabrata Bagchi, Kaustav Guha

Proceedings of the 47th Design Automation Conference, 2010

2008

Cohesive Coverage Management for Simulation and Formal Property Verification.

Aritra Hazra, Ansuman Banerjee, Srobona Mitra, Pallab Dasgupta, Partha Pratim Chakrabarti, Chunduri Rama Mohan

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2006

Battery-aware code partitioning for a text to speech system.

Anirban Lahiri, Anupam Basu, Monojit Choudhury, Srobona Mitra

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

1997

On Incorporation of BIST for the Synthesis of Easily and Fully Testable Controllers.

Chunduri Rama Mohan, Srobona Mitra, Partha Pal Chaudhuri

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997