Srivatsan Parthasarathy

According to our database, Srivatsan Parthasarathy authored at least 6 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Reduced RC Time Constant High Voltage Tolerant Supply Clamp for ESD Protection in 16nm FinFET Technology.

Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum

Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023

Optimization of SCR for High-Speed Digital and RF Applications in 45-nm SOI CMOS Technology.

Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum

Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022

A High Voltage Tolerant Supply Clamp for ESD Protection in a 45-nm SOI Technology.

Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2017

ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications.

Aihua Dong, Javier A. Salcedo, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Sirui Luo, Jean-Jacques Hajjar, Juin J. Liou

Microelectron. Reliab., 2017

2015

ESD protection clamp with active feedback and mis-trigger immunity in 28nm CMOS process.

Srivatsan Parthasarathy, Javier A. Salcedo, Sandro Herrera, Jean-Jacques Hajjar

Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014

Design optimization of SiGe BiCMOS Silicon Controlled Rectifier for Charged Device Model (CDM) protection applications.

Qiang Cui, Srivatsan Parthasarathy, Javier A. Salcedo, Juin J. Liou, Jean-Jacques Hajjar, Yuanzhong Paul Zhou

Microelectron. Reliab., 2014