Srivatsan Chellappa

According to our database, Srivatsan Chellappa authored at least 8 papers between 2010 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

SRAM-Based Unique Chip Identifier Techniques.

Srivatsan Chellappa, Lawrence T. Clark

IEEE Trans. Very Large Scale Integr. Syst., 2016

2015

Advanced encryption system with dynamic pipeline reconfiguration for minimum energy operation.

Srivatsan Chellappa, Chandarasekaran Ramamurthy, Vinay Vashishtha, Lawrence T. Clark

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

Temporal pulse-clocked multi-bit flip-flop mitigating SET and SEU.

Sushil Kumar, Srivatsan Chellappa, Lawrence T. Clark

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A soft-error hardened process portable embedded microprocessor.

Vinay Vashishtha, Lawrence T. Clark, Srivatsan Chellappa, Anudeep R. Gogulamudi, Aditya Gujja, Chad Farnsworth

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

Methodology to optimize critical node separation in hardened flip-flops.

Sandeep Shambhulingaiah, Srivatsan Chellappa, Sushil Kumar, Lawrence T. Clark

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013

A Self-Authenticating Chip Architecture Using an Intrinsic Fingerprint of Embedded DRAM.

Sami Rosenblatt, Srivatsan Chellappa, Alberto Cestero, Norman Robson, Toshiaki Kirihata, Subramanian S. Iyer

IEEE J. Solid State Circuits, 2013

2011

Improved circuits for microchip identification using SRAM mismatch.

Srivatsan Chellappa, Aritra Dey, Lawrence T. Clark

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010

In-situ characterization and extraction of SRAM variability.

Srivatsan Chellappa, Jia Ni, Xiaoyin Yao, Nathan D. Hindman, Jyothi Velamala, Min Chen, Yu Cao, Lawrence T. Clark

Proceedings of the 47th Design Automation Conference, 2010