Sriramkumar Venugopalan

According to our database1, Sriramkumar Venugopalan authored at least 11 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2016
A Dynamically Biased Multiband 2G/3G/4G Cellular Transmitter in 28 nm CMOS.
IEEE J. Solid State Circuits, 2016

2013
Accurate Prediction of Random Telegraph Noise Effects in SRAMs and DRAMs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

BSIM - SPICE Models Enable FinFET and UTB IC Designs.
IEEE Access, 2013

BSIM compact MOSFET models for SPICE simulation.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

Flicker noise in advanced CMOS technology: Effects of halo implant.
Proceedings of the European Solid-State Device Research Conference, 2013

SRAM read current variability and its dependence on transistor statistics.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
BSIM - Industry standard compact MOSFET models.
Proceedings of the 38th European Solid-State Circuit conference, 2012

Evaluation of the BSIM6 compact MOSFET model's scalability in 40nm CMOS technology.
Proceedings of the 38th European Solid-State Circuit conference, 2012

A non-iterative physical procedure for RF CMOS compact model extraction using BSIM6.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
SAMURAI: An accurate method for modelling and simulating non-stationary Random Telegraph Noise in SRAMs.
Proceedings of the Design, Automation and Test in Europe, 2011

MUSTARD: a coupled, stochastic/deterministic, discrete/continuous technique for predicting the impact of random telegraph noise on SRAMs and DRAMs.
Proceedings of the 48th Design Automation Conference, 2011


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