Sriram V. Garimella

According to our database1, Sriram V. Garimella authored at least 1 paper in 2000.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

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Links

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Bibliography

2000
Efficient techniques based on gate triggering for designing static CMOS ICs with very low glitch power dissipation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000


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