Sriram Aananthakrishnan

Orcid: 0000-0003-3951-0246

According to our database1, Sriram Aananthakrishnan authored at least 12 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
HotTiles: Accelerating SpMM with Heterogeneous Accelerator Architectures.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023
The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor.
IEEE Micro, 2023

2020
PIUMA: Programmable Integrated Unified Memory Architecture.
CoRR, 2020

Online and Real-time Object Tracking Algorithm with Extremely Small Matrices.
CoRR, 2020

Prune the Unnecessary: Parallel Pull-Push Louvain Algorithms with Automatic Edge Pruning.
Proceedings of the ICPP 2020: 49th International Conference on Parallel Processing, 2020

Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture.
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

2016
A Compostable Static Analysis Framework for Program Analysis.
PhD thesis, 2016

ParFuse: Parallel and Compositional Analysis of Message Passing Programs.
Proceedings of the Languages and Compilers for Parallel Computing, 2016

2013
Hybrid approach for data-flow analysis of MPI programs.
Proceedings of the International Conference on Supercomputing, 2013

2010
A Scalable and Distributed Dynamic Formal Verifier for MPI Programs.
Proceedings of the Conference on High Performance Computing Networking, 2010

2009
How Formal Dynamic Verification Tools Facilitate Novel Concurrency Visualizations.
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 2009

Some resources for teaching concurrency.
Proceedings of the 7th Workshop on Parallel and Distributed Systems: Testing, 2009


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