Srinivasan Gopal
Orcid: 0000-0003-4060-0716
According to our database1,
Srinivasan Gopal
authored at least 15 papers
between 2009 and 2021.
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Bibliography
2021
Diagnosis of Inter-Turn Shorts of Loaded Transformer Under Various Load Currents and Power Factors; Impulse Voltage-Based Frequency Response Approach.
IEEE Access, 2021
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
2020
A Hybrid 3D Interconnect With 2x Bandwidth Density Employing Orthogonal Simultaneous Bidirectional Signaling for 3D NoC.
IEEE Trans. Circuits Syst., 2020
ACM J. Emerg. Technol. Comput. Syst., 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A 25-35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Hierarchical Design Methodology and Optimization for Proximity Communication based Contactless 3D ThruChip Interface.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
A 16-Gb/s Low-Power Inductorless Wideband Gain-Boosted Baseband Amplifier With Skewed Differential Topology for Wireless Network-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst., 2018
A Spatial Multi-Bit Sub-1-V Time-Domain Matrix Multiplier Interface for Approximate Computing in 65-nm CMOS.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
A 28GHz 41%-PAE linear CMOS power amplifier using a transformer-based AM-PM distortion-correction technique for 5G phased arrays.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
2009
Circuits Syst. Signal Process., 2009