Srilata Raman

According to our database, Srilata Raman authored at least 12 papers between 1989 and 1997.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1997

Optimization Via Evolutionary Processes.

Srilata Raman, Lalit M. Patnaik

Adv. Comput., 1997

CELLERITY: A Fully Automatic Layout Synthesis System for Standard Cell Libraries.

Mohankumar Guruswamy, Robert L. Maziasz, Daniel Dulitz, Srilata Raman, Venkat Chiluvuri, Andrea Fernandez, Larry G. Jones

Proceedings of the 34st Conference on Design Automation, 1997

1996

Timing-Constrained FPGA Placement: A Force-Directed Formulation and Its Performance Evaluation.

Srilata Raman, C. L. Liu, Larry G. Jones

VLSI Design, 1996

Performance-driven MCM partitioning through an adaptive genetic algorithm.

Srilata Raman, Lalit M. Patnaik

IEEE Trans. Very Large Scale Integr. Syst., 1996

A Timing-Constrained Incremental Routing Algorithm for Symmetrical FPGAs.

Srilata Raman, C. L. Liu, Larry G. Jones

Proceedings of the 1996 European Design and Test Conference, 1996

1995

A genetic algorithm-based circuit partitioner for MCMs.

Ananta K. Majhi, Lalit M. Patnaik, Srilata Raman

Microprocess. Microprogramming, 1995

1994

A Parallel Simulated Annealing-Based Channel Router.

Rajib Mall, Srilata Raman, Lalit M. Patnaik

Int. J. High Speed Comput., 1994

A delay driven FPGA placement algorithm.

Srilata Raman, C. L. Liu, Larry G. Jones

Proceedings of the Proceedings EURO-DAC'94, 1994

1991

Quality-time tradeoffs in simulated annealing for VLSI placement.

Srilata Raman, Benjamin W. Wah

Proceedings of the Fifteenth Annual International Computer Software and Applications Conference, 1991

1990

Parallel Implementation of Circuit Simulation.

Srilata Raman, Lalit M. Patnaik, Rajib Mall

Int. J. High Speed Comput., 1990

An Annealing-Based Circuit Partitioner for Hypercube Architecture: Design and Performance Evaluation.

Srilata Raman, Lalit M. Patnaik

Int. J. High Speed Comput., 1990

1989

Hirecs: Hypercube Implementation of Relaxation-Based Circuit Simulation.

Srilata Raman, Lalit M. Patnaik

Int. J. High Speed Comput., 1989