Srikanth Venkataraman

According to our database, Srikanth Venkataraman authored at least 70 papers between 1995 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Generating Storage-Aware Test Sets Targeting Several Fault Models.

Hari Addepalli, Irith Pomeranz, M. Enamul Amyeen, Suriyaprakash Natarajan, Arani Sinha, Srikanth Venkataraman

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

2022

Using Fault Detection Tests to Produce Diagnostic Tests Targeting Large Sets of Candidate Faults.

Hari Addepalli, Irith Pomeranz, M. Enamul Amyeen, Suriyaprakash Natarajan, Arani Sinha, Srikanth Venkataraman

Proceedings of the IEEE 31st Asian Test Symposium, 2022

2021

Defect-Oriented Test: Effectiveness in High Volume Manufacturing.

Friedrich Hapke, Will Howell, Peter C. Maxwell, Edward Brazil, Srikanth Venkataraman, Rudrajit Dutta, Andreas Glowatz, Anja Fast, Janusz Rajski

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020

LFSR-Based Test Generation for Reduced Fail Data Volume.

Irith Pomeranz, Srikanth Venkataraman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Automating Design For Yield: Silicon Learning to Predictive Models and Design Optimization.

Srikanth Venkataraman, Pongpachara Limpisathian, Pascal Meinerzhagen, Suriyaprakash Natarajan, Eric Yang

Proceedings of the IEEE International Test Conference, 2020

2019

Layout Resynthesis by Applying Design-for-manufacturability Guidelines to Avoid Low-coverage Areas of a Cell-based Design.

Naixing Wang, Irith Pomeranz, Sudhakar M. Reddy, Arani Sinha, Srikanth Venkataraman

ACM Trans. Design Autom. Electr. Syst., 2019

Observation Point Placement for Improved Logic Diagnosis based on Large Sets of Candidate Faults.

Irith Pomeranz, Vivek Chickermane, Srikanth Venkataraman

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Resynthesis for Avoiding Undetectable Faults Based on Design-for-Manufacturability Guidelines.

Naixing Wang, Irith Pomeranz, Sudhakar M. Reddy, Arani Sinha, Srikanth Venkataraman

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

DPPM Reduction Methods and New Defect Oriented Test Methods Applied to Advanced FinFET Technologies.

Will Howell, Friedrich Hapke, Edward Brazil, Srikanth Venkataraman, R. Datta, Andreas Glowatz, Wilfried Redemund, J. Schmerberg, Anja Fast, Janusz Rajski

Proceedings of the IEEE International Test Conference, 2018

Interconnect-aware tests to complement gate-exhaustive tests.

Irith Pomeranz, Srikanth Venkataraman

Proceedings of the 23rd IEEE European Test Symposium, 2018

Improving the Resolution of Multiple Defect Diagnosis by Removing and Selecting Tests.

Naixing Wang, Irith Pomeranz, Brady Benware, M. Enamul Amyeen, Srikanth Venkataraman

Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

2017

Reordering Tests for Efficient Fail Data Collection and Tester Time Reduction.

Shraddha Bodhe, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman

IEEE Trans. Very Large Scale Integr. Syst., 2017

Test Modification for Reduced Volumes of Fail Data.

Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman

ACM Trans. Design Autom. Electr. Syst., 2017

Test reordering for improved scan chain diagnosis using an enhanced defect diagnosis procedure.

Srikanth Venkataraman, Irith Pomeranz, Shraddha Bodhe, M. Enamul Amyeen

Proceedings of the IEEE International Test Conference, 2017

2016

Diagnostic Fail Data Minimization Using an N-Cover Algorithm.

Shraddha Bodhe, M. Enamul Amyeen, Irith Pomeranz, Srikanth Venkataraman

IEEE Trans. Very Large Scale Integr. Syst., 2016

Reduction of diagnostic fail data volume and tester time using a dynamic N-cover algorithm.

Shraddha Bodhe, M. Enamul Amyeen, Clariza Galendez, Houston Mooers, Irith Pomeranz, Srikanth Venkataraman

Proceedings of the 34th IEEE VLSI Test Symposium, 2016

A novel diagnostic test generation methodology and its application in production failure isolation.

M. Enamul Amyeen, Dongok Kim, Maheshwar Chandrasekar, Mohammad Noman, Srikanth Venkataraman, Anurag Jain, Neha Goel, Ramesh Sharma

Proceedings of the 2016 IEEE International Test Conference, 2016

A Joint Diagnostic Test Generation Procedure with Dynamic Test Compaction.

M. Enamul Amyeen, Irith Pomeranz, Srikanth Venkataraman

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2014

Built-in generation of functional broadside tests considering primary input constraints.

Bo Yao, Irith Pomeranz, Srikanth Venkataraman, M. Enamul Amyeen

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013

Panel session what is the electronics industry doing to win the battle against the expected scary failure rates in future technology nodes?

Said Hamdioui, Davide Appello, Arnaud Grasset, Xinli Gu, Bram Kruseman, Riccardo Mariani, Hermann Obermeir, Srikanth Venkataraman

Proceedings of the 18th IEEE European Test Symposium, 2013

2012

Tutorial T3: DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield.

Srikanth Venkataraman, Nagesh Tamarapalli

Proceedings of the 25th International Conference on VLSI Design, 2012

2011

Logic BIST silicon debug and volume diagnosis methodology.

M. Enamul Amyeen, Andal Jayalakshmi, Srikanth Venkataraman, Sundar V. Pathy, Ewe C. Tan

Proceedings of the 2011 IEEE International Test Conference, 2011

2010

Defect diagnosis based on DFM guidelines.

Dongok Kim, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

2009

Automated Debug of Speed Path Failures Using Functional Tests.

Richard McLaughlin, Srikanth Venkataraman, Carlston Lim

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Microprocessor system failures debug and fault isolation methodology.

M. Enamul Amyeen, Srikanth Venkataraman, Mun Wai Mak

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

Diagnosis of Scan Clock Failures.

King Leong Lee, Nadir Z. Basturkmen, Srikanth Venkataraman

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

DFM / DFT / SiliconDebug / Diagnosis.

Srikanth Venkataraman, Nagesh Tamarapalli

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Prioritizing the Application of DFM Guidelines Based on the Detectability of Systematic Defects.

Dongok Kim, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman

Proceedings of the 17th IEEE Asian Test Symposium, 2008

2007

z-Diagnosis: A Framework for Diagnostic Fault Simulation and Test Generation Utilizing Subsets of Outputs.

Irith Pomeranz, Sudhakar M. Reddy, Srikanth Venkataraman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Using Scan-Dump Values to Improve Functional-Diagnosis Methodology.

Vishnu C. Vimjam, M. Enamul Amyeen, Ruifeng Guo, Srikanth Venkataraman, Michael S. Hsiao, Kai Yang

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

Testing for systematic defects based on DFM guidelines.

Dongok Kim, M. Enamul Amyeen, Srikanth Venkataraman, Irith Pomeranz, Swagato Basumallick, Berni Landau

Proceedings of the 2007 IEEE International Test Conference, 2007

Quality Driven Manufacturing and SOC Designs.

Srikanth Venkataraman, Nagesh Nagapalli, Lech Józwiak

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield.

Srikanth Venkataraman

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Making Manufacturing Work For You.

Srikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian

Proceedings of the 44th Design Automation Conference, 2007

2006

Extraction error modeling and automated model debugging in high-performance custom designs.

Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman

IEEE Trans. Very Large Scale Integr. Syst., 2006

An algorithmic technique for diagnosis of faulty scan chains.

Ruifeng Guo, Srikanth Venkataraman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Accelerating Diagnostic Fault Simulation Using Z-diagnosis and Concurrent Equivalence Identification.

Bharath Seshadri, Xiaoming Yu, Srikanth Venkataraman

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

Dominance Based Analysis for Large Volume Production Fail Diagnosis.

Bharath Seshadri, Irith Pomeranz, Srikanth Venkataraman, M. Enamul Amyeen, Sudhakar M. Reddy

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive.

Ruifeng Guo, Subhasish Mitra, M. Enamul Amyeen, Jinkyu Lee, Srihari Sivaraj, Srikanth Venkataraman

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield.

David Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Improving Precision Using Mixed-level Fault Diagnosis.

M. Enamul Amyeen, Debashis Nayak, Srikanth Venkataraman

Proceedings of the 2006 IEEE International Test Conference, 2006

2005

Achieving higher yield through diagnosis?

Srikanth Venkataraman

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Enabling yield analysis with X-compact.

Zoran Stanojevic, Ruifeng Guo, Subhasish Mitra, Srikanth Venkataraman

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Fault Diagnosis and Fault Model Aliasing.

Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

Extraction Error Modeling and Automated Model Debugging in High-Performance Low Power Custom Designs.

Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman

Proceedings of the 2005 Design, 2005

2004

An Experimental Study of N-Detect Scan ATPG Patterns on a Processor.

Srikanth Venkataraman, Srihari Sivaraj, M. Enamul Amyeen, Sangbong Lee, Ajay Ojha, Ruifeng Guo

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application.

Debashis Nayak, Srikanth Venkataraman, Paul J. Thadikaran

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

Defect Diagnosis Based on Pattern-Dependent Stuck-At Faults.

Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, M. Enamul Amyeen

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Diagnosis meets Physical Failure Analysis: What is needed to succeed?

Srikanth Venkataraman

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Z-DFD: Design-for-Diagnosability Based on the Concept of Z-Detection.

Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Evaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor.

M. Enamul Amyeen, Srikanth Venkataraman, Ajay Ojha, Sangbong Lee

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis.

Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, Bharath Seshadri

Proceedings of the 2004 Design, 2004

2003

Concurrent Execution of Diagnostic Fault Simulation and Equivalence Identification During Diagnostic Test Generation.

Xiaoming Yu, M. Enamul Amyeen, Srikanth Venkataraman, Ruifeng Guo, Irith Pomeranz

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

2001

Diagnostic simulation of stuck-at faults in sequential circuits using compact lists.

Ismed Hartanto, Srikanth Venkataraman, W. Kent Fuchs, Elizabeth M. Rudnick, Janak H. Patel, Sreejit Chakravarty

ACM Trans. Design Autom. Electr. Syst., 2001

Poirot: Applications of a Logic Fault Diagnosis Tool.

Srikanth Venkataraman, Scott Brady Drummonds

IEEE Des. Test Comput., 2001

On Diagnosing Path Delay Faults in an At-Speed Environment.

Ramesh C. Tekumalla, Srikanth Venkataraman, Jayabrata Ghosh-Dastidar

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

A technique for fault diagnosis of defects in scan chains.

Ruifeng Guo, Srikanth Venkataraman

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

2000

A Technique for Logic Fault Diagnosis of Interconnect Open Defects.

Srikanth Venkataraman, Scott Brady Drummonds

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

POIROT: a logic fault diagnosis tool and its applications.

Srikanth Venkataraman, Scott Brady Drummonds

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1999

Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits.

Andreas G. Veneris, Ibrahim N. Hajj, Srikanth Venkataraman, W. Kent Fuchs

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

1998

Diagnostic Simulation of Sequential Circuits Using Fault Sampling.

Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

1997

Simulation- and Deduction-Based Techniques for Fault Diagnosis

Srikanth Venkataraman

PhD thesis, 1997

Distributed Diagnostic Simulation of Stuck-At Faults in Sequential Circuits.

Srikanth Venkataraman, W. Kent Fuchs

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

Diagnosis of Bridging Faults in Sequential Circuits Using Adaptive Simulation, State Storage, and Path-Tracing.

Srikanth Venkataraman, W. Kent Fuchs

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

A deductive technique for diagnosis of bridging faults.

Srikanth Venkataraman, W. Kent Fuchs

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996

Diagnostic simulation of stuck-at faults in combinational circuits.

Sreejit Chakravarty, Yiming Gong, Srikanth Venkataraman

J. Electron. Test., 1996

Dynamic diagnosis of sequential circuits based on stuck-at faults.

Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Partial Scan Design Based on Circuit State Information.

Dong Xiang, Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel

Proceedings of the 33st Conference on Design Automation, 1996

1995

Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.

Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois

IEEE Trans. Computers, 1995

Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists.

Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel

Proceedings of the 32st Conference on Design Automation, 1995