Sri Raga Sudha Garimella
According to our database1,
Sri Raga Sudha Garimella
authored at least 6 papers
between 2007 and 2019.
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Bibliography
2019
Novel 3D Monotonic Characterization of Standard Cell Liberty File Attributes w.r.t ASIC Tool Flow.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2013
New generation carry look twice-ahead adder CL2A and carry look thrice-ahead adder CL3A.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
2008
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
Highly Linear Wide Dynamic Swing CMOS Transconductance Multiplier Using Source-Degeneration V-I Converters.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
Design of highly linear multipliers using floating gate transistors and/or source degeneration resistor.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
New highly-accurate CMOS source-degenerated based V-I converter with positive feedback.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007