Sreehari Veeramachaneni
Orcid: 0000-0001-7744-4580
According to our database1,
Sreehari Veeramachaneni
authored at least 48 papers
between 2007 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor.
IEEE Embed. Syst. Lett., June, 2024
IEEE Access, 2024
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
Integr., November, 2023
J. Circuits Syst. Comput., April, 2023
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
2022
J. Comput. Methods Sci. Eng., 2022
J. Electron. Test., 2022
Circuits Syst. Signal Process., 2022
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022
2021
Int. J. Circuit Theory Appl., 2021
Efficient design of 15: 4 counter using a novel 5: 3 counter for high-speed multiplication.
IET Comput. Digit. Tech., 2021
Comput. Electr. Eng., 2021
Energy Efficient Approximate Multiplier Design for Image/Video Processing Applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021
Proceedings of the International Conference on Microelectronics, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
2020
Efficient implementation of mixed-precision multiply-accumulator unit for AI algorithms.
Int. J. Circuit Theory Appl., 2020
2018
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018
2014
A Novel Low Power Error Detection Logic for Inexact Leading Zero Anticipator in Floating Point Units.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Proceedings of the 2014 Fifth International Symposium on Electronic System Design, 2014
2012
Low-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive Resolution Flash ADCs.
Proceedings of the 25th International Conference on VLSI Design, 2012
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Proceedings of the International Symposium on Electronic System Design, 2012
Proceedings of the International Symposium on Communications and Information Technologies, 2012
2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
A Reconfigurable INC/DEC/2's Complement/Priority Encoder Circuit with Improved Decision Block.
Proceedings of the International Symposium on Electronic System Design, 2011
Proceedings of the International Symposium on Electronic System Design, 2011
Increment/decrement/2's complement/priority encoder circuit for varying operand lengths.
Proceedings of the 11th International Symposium on Communications and Information Technologies, 2011
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
2010
An Alternate Approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects.
J. Low Power Electron., 2010
An Alternative approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Low power, variable resolution pipelined analog to Digital converter with sub flash architecture.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
J. Low Power Electron., 2009
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
2008
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007