Spyros Theoharis
According to our database1,
Spyros Theoharis
authored at least 16 papers
between 1996 and 2003.
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Bibliography
2003
IEEE Trans. Very Large Scale Integr. Syst., 2003
2002
Low-power Implementation of an Encryption/Decryption System with Asynchronous Techniques.
VLSI Design, 2002
Memory accesses reordering for interconnect power reduction in sum-of-products computations.
IEEE Trans. Signal Process., 2002
A fast and accurate delay dependent method for switching estimation of large combinational circuits.
J. Syst. Archit., 2002
Proceedings of the 14th International Conference on Digital Signal Processing, 2002
2001
VLSI Design, 2001
A Probabilistic Power Estimation Method for Combinational Circuits Under Real Gate Delay Model.
VLSI Design, 2001
2000
Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital Receivers.
Proceedings of the Integrated Circuit Design, 2000
Proceedings of the Integrated Circuit Design, 2000
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000
A methodology for the behavioral-level event-driven power management of digital receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996