Sourja Ray

According to our database1, Sourja Ray authored at least 5 papers between 2004 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
A 14b 2.5GS/s 8-way-interleaved pipelined ADC with background calibration and digital dynamic linearity correction.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2008
Calibration of multi-bit per stage pipelined ADC using statistical properties of capacitor arrays
PhD thesis, 2008

2007
A 13-b Linear, 40-MS/s Pipelined ADC With Self-Configured Capacitor Matching.
IEEE J. Solid State Circuits, 2007

2006
A 13b linear 40MS/s pipelined ADC with self-configured capacitor matching.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2004
A 14-b linear capacitor self-trimming pipelined ADC.
IEEE J. Solid State Circuits, 2004


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