Sourav Das

According to our database, Sourav Das authored at least 22 papers between 2015 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2020

A Hybrid 3D Interconnect With 2x Bandwidth Density Employing Orthogonal Simultaneous Bidirectional Signaling for 3D NoC.

Srinivasan Gopal, Sourav Das, Partha Pratim Pande, Deukhyoun Heo

IEEE Trans. Circuits Syst., 2020

Testing of Prebond Through Silicon Vias.

Sourav Das, Fei Su, Sreejit Chakravarty

IEEE Des. Test, 2020

2019

Impact of Electrostatic Coupling on Monolithic 3D-enabled Network on Chip.

Dongjin Lee, Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

ACM Trans. Design Autom. Electr. Syst., 2019

Analyzing power-thermal-performance trade-offs in a high-performance 3D NoC architecture.

Dongjin Lee, Sourav Das, Partha Pratim Pande

Integr., 2019

A Comparative Study of Pre-bond TSV Test Methodologies.

Sourav Das, Fei Su, Sreejit Chakravarty

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

2018

High-Performance and Small-Form Factor Near-Field Inductive Coupling for 3-D NoC.

Srinivasan Gopal, Sourav Das, Pawan Agarwal, Sheikh Nijam Ali, Deukhyoun Heo, Partha Pratim Pande

IEEE Trans. Very Large Scale Integr. Syst., 2018

Performance and Thermal Tradeoffs for Energy-Efficient Monolithic 3D Network-on-Chip.

Dongjin Lee, Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

ACM Trans. Design Autom. Electr. Syst., 2018

Design Space Exploration of 3D Network-on-Chip: A Sensitivity-based Optimization Approach.

Dongjin Lee, Sourav Das, Dae Hyun Kim, Janardhan Rao Doppa, Partha Pratim Pande

ACM J. Emerg. Technol. Comput. Syst., 2018

Abetting Planned Obsolescence by Aging 3D Networks-on-Chip.

Sourav Das, Kanad Basu, Janardhan Rao Doppa, Partha Pratim Pande, Ramesh Karri, Krishnendu Chakrabarty

Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018

A PVT-Resilient No-Touch DFT Methodology for Prebond TSV Testing.

Sourav Das, Fei Su, Sreejit Chakravarty

Proceedings of the IEEE International Test Conference, 2018

2017

VFI-Based Power Management to Enhance the Lifetime of High-Performance 3D NoCs.

Sourav Das, Dongjin Lee, Wonje Choi, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

ACM Trans. Design Autom. Electr. Syst., 2017

Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3-D Small-World Network-on-Chip.

Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Energy and Area Efficient Near Field Inductive Coupling: A Case Study on 3D NoC.

Srinivasan Gopal, Sourav Das, Deukhyoun Heo, Partha Pratim Pande

Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017

Performance-thermal trade-offs for a VFI-enabled 3D NoC architecture.

Dongjin Lee, Sourav Das, Partha Pratim Pande

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Monolithic 3D-Enabled High Performance and Energy Efficient Network-on-Chip.

Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Energy-efficient and robust 3D NoCs with contactless vertical links (Invited paper).

Sourav Das, Srinivasan Gopal, Deukhyoun Heo, Partha Pratim Pande

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Robust TSV-based 3D NoC design to counteract electromigration and crosstalk noise.

Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3D Small-world Network-on-Chip.

Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

CoRR, 2016

Energy-efficient and reliable 3D network-on-chip (NoC): architectures and optimization algorithms.

Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Reliability and performance trade-offs for 3D NoC-enabled multicore chips.

Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Optimizing 3D NoC Design for Energy Efficiency: A Machine Learning Approach.

Sourav Das, Janardhan Rao Doppa, Daehyun Kim, Partha Pratim Pande, Krishnendu Chakrabarty

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Small-World Network Enabled Energy Efficient and Robust 3D NoC Architectures.

Sourav Das, Dongjin Lee, Dae Hyun Kim, Partha Pratim Pande

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015