Soumitra Pal
Orcid: 0000-0002-6186-6209Affiliations:
- Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Hong Kong
- Birla Institute of Technology, Ranchi, Jharkhand, India (former)
According to our database1,
Soumitra Pal
authored at least 13 papers
between 2016 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Energy-Efficient Dual-Node-Upset-Recoverable 12T SRAM for Low-Power Aerospace Applications.
IEEE Access, 2023
2022
Soft-Error-Aware Read-Stability-Enhanced Low-Power 12T SRAM With Multi-Node Upset Recoverability for Aerospace Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
2021
Highly Stable Low Power Radiation Hardened Memory-by-Design SRAM for Space Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Soft-Error-Aware Read-Decoupled SRAM With Multi-Node Recovery for Aerospace Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Soft-Error-Immune Read-Stability-Improved SRAM for Multi-Node Upset Tolerance in Space Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Design of Soft-Error-Aware SRAM With Multi-Node Upset Recovery for Aerospace Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Int. J. Circuit Theory Appl., 2021
2020
40.68 MHz Digital On-Off Delay-Compensated Active Rectifier for WPT of Biomedical Applications.
IEEE Trans. Circuits Syst., 2020
IET Circuits Devices Syst., 2020
2019
Microelectron. J., 2019
Transmission gate-based 9T SRAM cell for variation resilient low power and reliable internet of things applications.
IET Circuits Devices Syst., 2019
2016
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016