Soumendu Bhattacharya
According to our database1,
Soumendu Bhattacharya
authored at least 36 papers
between 1993 and 2013.
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Bibliography
2013
Predicting die-level process variations from wafer test data for analog devices: A feasibility study.
Proceedings of the 14th Latin American Test Workshop, 2013
2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Concurrent Device/Specification Cause-Effect Monitoring for Yield Diagnosis Using Alternate Diagnostic Signatures.
IEEE Des. Test Comput., 2012
2011
Optimized Multitone Test Stimulus Driven Diagnosis of RF Transceivers Using Model Parameter Estimation.
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011
2010
Concurrent process model and specification cause-effect monitoring using alternate diagnostic signatures.
Proceedings of the 28th IEEE VLSI Test Symposium, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Proceedings of the 27th International Conference on Computer Design, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008
2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
Low-cost parametric test and diagnosis of RF systems using multi-tone response envelope detection.
IET Comput. Digit. Tech., 2007
Probabilistic Compensation for Digital Filters Using Pervasive Noise-Induced Operator Errors.
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007
2006
An Accurate DNA Sensing and Diagnosis Methodology Using Fabricated Silicon Nanopores.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
IEEE Des. Test Comput., 2006
Alternate Electrical Tests for Extracting Mechanical Parameters of MEMS Accelerometer Sensors.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Design of Soft Error Resilient Linear Digital Filters Using Checksum-Based Probabilistic Error Correction.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Efficient DNA Sensing with Fabricated Silicon Nanopores: Diagnosis Methodology and Algorithms.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Probabilistic Error Correction in Linear Digital Filters Using Checksum Codes.
Proceedings of the 7th Latin American Test Workshop, 2006
Proceedings of the 11th European Test Symposium, 2006
Improving SNR for DSM Linear Systems Using Probabilistic Error Correction and State Restoration: A Comparative Study.
Proceedings of the 11th European Test Symposium, 2006
2005
PhD thesis, 2005
ACM Trans. Design Autom. Electr. Syst., 2005
Alternate Testing of RF Transceivers Using Optimized Test Stimulus for Accurate Prediction of System Specifications.
J. Electron. Test., 2005
Production Test Methods for Measuring 'Out-of-Band' Interference of Ultra Wide Band (UWB) Devices.
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
A System-Level Alternate Test Approach for Specification Test of RF Transceivers in Loopback Mode.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Production test enhancement techniques for MB-OFDM ultra-wide band (UWB) devices: EVM and CCDF.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
On-Chip Self-Calibration of RF Circuits Using Specification-Driven Built-In Self Test (S-BIST).
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
2004
System-level Testing of RF Transmitter Specifications Using Optimized Periodic Bitstreams.
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Test Time Reduction for ACPR Measurement of Wireless Transceivers Using Periodic Bit-Stream Sequences.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Efficient Test Strategy for TDMA Power Amplifiers Using Transient Current Measurements: Uses and Benefit.
Proceedings of the 2004 Design, 2004
A Built-In Loopback Test Methodology for RF Transceiver Circuits Using Embedded Sensor Circuits.
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004
2003
High Coverage Analog Wafer-Probe Test Design and Co-optimization with Assembled-Package Test to Minimize Overall Test Cost.
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003
Automatic Multitone Alternate Test Generation For RF Circuits Using Behavioral Models.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
2002
Constrained Specification-Based Test Stimulus Generation for Analog Circuits Using Nonlinear Performance Prediction Models.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002
1993
Pattern Recognit., 1993