Soujanya Venigalla

According to our database1, Soujanya Venigalla authored at least 2 papers between 2005 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2009
Low-Power Clocked-Pseudo-NMOS Flip-Flop for Level Conversion in Dual Supply Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2009

2005
Design and Implementaion of a 2D-DCT Architecture Using Coefficient Distributed Arithmetic.
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005


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