Soujanya Narnur

According to our database, Soujanya Narnur authored at least 2 papers between 2011 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2012

A 1.25GHz 0.8W C66x DSP Core in 40nm CMOS.

Raguram Damodaran, Timothy Anderson, Sanjive Agarwala, Rama Venkatasubramanian, Michael Gill, Dhileep Gopalakrishnan, Anthony M. Hill, Abhijeet Chachad, Dheera Balasubramanian, Naveen Bhoria, Jonathan Tran, Duc Bui, Mujibur Rahman, Shriram Moharil, Matthew Pierson, Steven Mullinnix, Hung Ong, David Thompson, Krishna Gurram, Oluleye Olorode, Nuruddin Mahmood, Jose Flores, Arjun Rajagopal, Soujanya Narnur, Daniel Wu, Alan Hales, Kyle Peavy, Robert Sussman

Proceedings of the 25th International Conference on VLSI Design, 2012

2011

A 1.5 Ghz VLIW DSP CPU with Integrated Floating Point and Fixed Point Instructions in 40 nm CMOS.

Timothy Anderson, Duc Bui, Shriram Moharil, Soujanya Narnur, Mujibur Rahman, Anthony Lell, Eric Biscondi, Ashish Shrivastava, Peter Dent, Mingjian Yan, Hasan Mahmood

Proceedings of the 20th IEEE Symposium on Computer Arithmetic, 2011