Sougata Kumar Kar
Orcid: 0000-0003-2192-0845
According to our database1,
Sougata Kumar Kar
authored at least 19 papers
between 2006 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2025
A novel tunable capacitively-copuled instrumentation amplifier with 14.4 nV/ √(H z) noise and 190.47 nW micro-power for ECG applications.
Integr., 2025
2024
An efficient real-time ECG QRS-complex identification by A-CLT and digital fractional order differentiation.
Biomed. Signal Process. Control., 2024
A Low-Power 10-bit SAR ADC with an Integrated CDAC and C-MOSCAP DAC for Implantable Pacemakers.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024
An 8-bit 1 MS/s Low-Power SAR ADC with an Enhanced EPC for Implantable Medical Devices.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
2021
On-Chip Implementable Autocalibration of Sensor Offset for Differential Capacitive Sensor Interfaces.
IEEE Trans. Instrum. Meas., 2021
A 200 μg/√Hz, 2.7 milli-g Offset Differential Interface for Capacitive Micro Accelerometer.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2020
IEEE Trans. Instrum. Meas., 2020
2018
IEEE Trans. Instrum. Meas., 2018
Spiking Neural Classifier with Lumped Dendritic Nonlinearity and Binary Synapses: A Current Mode VLSI Implementation and Analysis.
Neural Comput., 2018
A Differential Output Switched Capacitor based Capacitive Sensor Interfacing Circuit.
Proceedings of the TENCON 2018, 2018
Proceedings of the 12th International Conference on Sensing Technology, 2018
2016
Design, integration and performance analysis of ΣΔ ADC for capacitive sensor interfacing.
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016
Design methodology of closed loop MEMS capacitive accelerometers based on ΣΔ modulation technique.
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016
2015
Systematic Development of Integrated Capacitance Measurement System With Sensitivity Tuning.
IEEE Trans. Instrum. Meas., 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
2012
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012
2011
IEEE Trans. Instrum. Meas., 2011
2006
High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006