Sotiris Tselonis
According to our database1,
Sotiris Tselonis
authored at least 13 papers
between 2013 and 2018.
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Bibliography
2018
Multi-faceted microarchitecture level reliability characterization for NVIDIA and AMD GPUs.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
2017
Proceedings of the 35th IEEE VLSI Test Symposium, 2017
Microarchitecture level reliability comparison of modern GPU designs: First findings.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
2016
Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016
Proceedings of the 2016 IEEE International Test Conference, 2016
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016
2015
Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview.
Microprocess. Microsystems, 2015
Bayesian network early reliability evaluation analysis for both permanent and transient faults.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015
Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015
Proceedings of the 20th IEEE European Test Symposium, 2015
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015
2014
Versatile architecture-level fault injection framework for reliability evaluation: A first report.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
2013
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013