Sorin P. Voinigescu

Orcid: 0000-0001-5134-1970

Affiliations:
  • University of Toronto, Canada


According to our database1, Sorin P. Voinigescu authored at least 67 papers between 1997 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2017, "For contributions to silicon and silicon-germanium microwave and millimeter-wave devices and integrated circuits".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

Online presence:

On csauthors.net:

Bibliography

2023
An 80-GBaud PAM-4 $G_{\mathrm{m}}$ -Boosted Variable-Gain TIA in 22-nm FDSOI.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2023

A Circuit Designer's Perspective on Transistor Modelling Challenges for 6G, Fiberoptics, and Quantum Computing ICs.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2023

2021
Compact Modelling of 22nm FDSOI CMOS Semiconductor Quantum Dot Cryogenic I-V Characteristics.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

200-GS/s ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator.
Proceedings of the 47th ESSCIRC 2021, 2021

2019
Design of a 55-nm SiGe BiCMOS 5-bit Time-Interleaved Flash ADC for 64-Gbd 16-QAM Fiberoptics Applications.
IEEE J. Solid State Circuits, 2019

A 4.6V, 6-bit, 64GS/s Transmitter in 22nm FDSOI CMOS.
Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019

2018
A<i>D</i>-Band Digital Transmitter with 64-QAM and OFDM Free-Space Constellation Formation.
IEEE J. Solid State Circuits, 2018

mmWand high speed solutions enabled by FD-SOI.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

128-GS/s ADC Front-End with Over 60-GHz Input Bandwidth in 22-nm Si/SiGe FDSOI CMOS.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

A 2x-Oversampling, 128-GS/s 5-bit Flash ADC for 64-GBaud Applications.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

A 256-Gbps PAM-4 Signal Generator IC in 0.25-µm InP DHBT Technology.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

Large-Swing 22nm Si/SiGe FDSOI Stacked Cascodes for 56GBaud Drivers and 5G PAs.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

2017
Silicon Millimeter-Wave, Terahertz, and High-Speed Fiber-Optic Device and Benchmark Circuit Scaling Through the 2030 ITRS Horizon.
Proc. IEEE, 2017

SiGe HBT Technology: Future Trends and TCAD-Based Roadmap.
Proc. IEEE, 2017

Introduction to the Special Section on the 2016 IEEE BCTM and IEEE CSICS.
IEEE J. Solid State Circuits, 2017

A 44Gbps high extinction ratio silicon Mach-Zehnder modulator with a 3D-integrated 28nm FD-SOI CMOS driver.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

A 13.2-dBm, 138-GHz I/Q RF-DAC with 64-QAM and OFDM free-space constellation formation.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016
A 3×60Gb/s Transmitter/Repeater Front-End With 4.3V<sub>PP</sub> Single-Ended Output Swing in a 28nm UTBB FD-SOI Technology.
IEEE J. Solid State Circuits, 2016

A 234-261-GHz 55-nm SiGe BiCMOS Signal Source with 5.4-7.2 dBm Output Power, 1.3% DC-to-RF Efficiency, and 1-GHz Divided-Down Output.
IEEE J. Solid State Circuits, 2016

55-nm SiGe BiCMOS Distributed Amplifier Topologies for Time-Interleaved 120-Gb/s Fiber-Optic Receivers and Transmitters.
IEEE J. Solid State Circuits, 2016

Analog Circuit Blocks for 80-GHz Bandwidth Frequency-Interleaved, Linear, Large-Swing Front-Ends.
IEEE J. Solid State Circuits, 2016

2015
A 3×40Gb/s 28nm FDSOI CMOS front-end array with 10mVPP sensitivity and >4VPP output swing.
Proceedings of the ESSCIRC Conference 2015, 2015

2014
A 19 dBm, 15 Gbaud, 9 bit SOI CMOS Power-DAC Cell for High-Order QAM W-Band Transmitters.
IEEE J. Solid State Circuits, 2014

A High Modulation Bandwidth, 110 GHz Power-DAC Cell for IQ Transmitter Arrays With Direct Amplitude and Phase Modulation.
IEEE J. Solid State Circuits, 2014

2013
A Study of SiGe HBT Signal Sources in the 220-330-GHz Range.
IEEE J. Solid State Circuits, 2013

A 2-Bit, 24 dBm, Millimeter-Wave SOI CMOS Power-DAC Cell for Watt-Level High-Efficiency, Fully Digital m-ary QAM Transmitters.
IEEE J. Solid State Circuits, 2013

2012
A 45nm SOI CMOS Class-D mm-Wave PA with >10Vpp differential swing.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
Design of a Dual W- and D-Band PLL.
IEEE J. Solid State Circuits, 2011

A 2.4-V<sub>pp</sub> 60-Gb/s CMOS Driver With Digitally Variable Amplitude and Pre-Emphasis Control at Multiple Peaking Frequencies.
IEEE J. Solid State Circuits, 2011

2010
A Passive W-Band Imaging Receiver in 65-nm Bulk CMOS.
IEEE J. Solid State Circuits, 2010

An 18-Gb/s, Direct QPSK Modulation SiGe BiCMOS Transceiver for Last Mile Links in the 70-80 GHz Band.
IEEE J. Solid State Circuits, 2010

2009
A Zero-IF 60 GHz 65 nm CMOS Transceiver With Direct BPSK Modulation Demonstrating up to 6 Gb/s Data Rates Over a 2 m Wireless Link.
IEEE J. Solid State Circuits, 2009

A 35-GS/s, 4-Bit Flash ADC With Active Data and Clock Distribution Trees.
IEEE J. Solid State Circuits, 2009

A 1 GHz Bandwidth Low-Pass ΔΣADC With 20-50 GHz Adjustable Sampling Rate.
IEEE J. Solid State Circuits, 2009

0.13µm SiGe BiCMOS Technology Fully Dedicated to mm-Wave Applications.
IEEE J. Solid State Circuits, 2009

2008
Single-Chip W-band SiGe HBT Transceivers and Receivers for Doppler Radar and Millimeter-Wave Imaging.
IEEE J. Solid State Circuits, 2008

165-GHz Transceiver in SiGe Technology.
IEEE J. Solid State Circuits, 2008

A Wideband W-Band Receiver Front-End in 65-nm CMOS.
IEEE J. Solid State Circuits, 2008

A Large Swing, 40-Gb/s SiGe BiCMOS Driver With Adjustable Pre-Emphasis for Data Transmission Over 75Ω Coaxial Cable.
IEEE J. Solid State Circuits, 2008

A 95GHz Receiver with Fundamental-Frequency VCO and Static Frequency Divider in 65nm Digital CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A zero-IF 60GHz transceiver in 65nm CMOS with ≫ 3.5Gb/s links.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Will BiCMOS stay competitive for mmW applications ?
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio.
IEEE J. Solid State Circuits, 2007

Design and Scaling of W-Band SiGe BiCMOS VCOs.
IEEE J. Solid State Circuits, 2007

Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS.
IEEE J. Solid State Circuits, 2007

Low-Voltage Topologies for 40-Gb/s Circuits in Nanoscale CMOS.
IEEE J. Solid State Circuits, 2007

A Low-Noise 40-GS/s Continuous-Time Bandpass ΔΣ ADC Centered at 2 GHz for Direct Sampling Receivers.
IEEE J. Solid State Circuits, 2007

CMOS SOCs at 100 GHz: System Architectures, Device Characterization, and IC Design Examples.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Design for millimeter-wave applications in silicon technologies.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

Towards a sub-2.5V, 100-Gb/s Serial Transceiver.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

65-nm CMOS, W-Band Receivers for Imaging Applications.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18-$muhbox m$SiGe BiCMOS Technology.
IEEE J. Solid State Circuits, 2006

A 60 mW per Lane, 4$, times, $23-Gb/s 2$ ^7 -$1 PRBS Generator.
IEEE J. Solid State Circuits, 2006

A 1-Tap 40-Gb/s Look-Ahead Decision Feedback Equalizer in 0.18-$muhbox m$SiGe BiCMOS Technology.
IEEE J. Solid State Circuits, 2006

The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks.
IEEE J. Solid State Circuits, 2006

A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
An 80-Gb/s 2<sup>31</sup>-1 pseudorandom binary sequence generator in SiGe BiCMOS technology.
IEEE J. Solid State Circuits, 2005

A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic.
IEEE J. Solid State Circuits, 2005

System-on-Chip Design beyond 50 GHz, invited.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

Algorithmic design methodologies and design porting of wireline transceiver IC building blocks between technology nodes.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
Correction to "6-k$Omega$43-Gb/s Differential Transimpedance-Limiting Amplifier With Auto-Zero Feedback and High Dynamic Range".
IEEE J. Solid State Circuits, 2004

6-kΩ 43-Gb/s differential transimpedance-limiting amplifier with auto-zero feedback and high dynamic range.
IEEE J. Solid State Circuits, 2004

An inductor-based 52-GHz 0.18 μm SiGe HBT cascode LNA with 22 dB gain.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

A 1.5V 20/30 Gb/s CMOS backplane driver with digital pre-emphasis.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
A 3-V fully differential distributed limiting driver for 40-Gb/s optical transmission systems.
IEEE J. Solid State Circuits, 2003

2001
Circuits and technologies for highly integrated optical networking ICs at 10 Gb/s to 40 Gb/s.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

1997
A scalable high-frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design.
IEEE J. Solid State Circuits, 1997


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