Sorin Cristoloveanu

According to our database1, Sorin Cristoloveanu authored at least 34 papers between 1999 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2001, "For contributions to Silicon-on-Insulator device physics, technology, and characterization.".

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Thin-Film FD-SOI BIMOS Topologies for ESD Protection.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Temperature and Gate Leakage Influence on the Z<sup>2</sup>-FET Memory Operation.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Sharp switching, hysteresis-free characteristics of Z<sup>2</sup>-FET for fast logic applications.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017
Toward Gated-Diode-BIMOS for thin silicon ESD protection in advanced FD-SOI CMOS technologies.
Proceedings of the 2017 IEEE International Conference on IC Design and Technology, 2017

Carrier lifetime evaluation in FD-SOI layers.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016
Novel AlGaN/GaN omega-FinFETs with excellent device performances.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

Novel FDSOI band-modulation device: Z<sup>2</sup>-FET with Dual Ground Planes.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

FDSOI devices: Issues and innovative solutions.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015
Performance and reliability of strained SOI transistors for advanced planar FDSOI technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Preliminary 3D TCAD electro-thermal simulations of BIMOS transistor in thin silicon film for ESD protection in FDSOI UTBB CMOS technology.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Fabrication of high performance AlGaN/GaN FinFET by utilizing anisotropic wet etching in TMAH solution.
Proceedings of the 45th European Solid State Device Research Conference, 2015

Low-frequency noise in bare SOI wafers: Experiments and model.
Proceedings of the 45th European Solid State Device Research Conference, 2015

Back-gate effects and detailed characterization of junctionless transistor.
Proceedings of the 45th European Solid State Device Research Conference, 2015

EDMOS in ultrathin FDSOI: Effect of doping and layout of the drift region.
Proceedings of the 45th European Solid State Device Research Conference, 2015

Sharp-switching Z<sup>2</sup>-FET device in 14 nm FDSOI technology.
Proceedings of the 45th European Solid State Device Research Conference, 2015

2014
Mobility spectrum analysis of magnetoresistance in fully-depleted MOSFETs.
Proceedings of the 44th European Solid State Device Research Conference, 2014

CMOS VT characterization by capacitance measurements in FDSOI PIN gated diodes.
Proceedings of the 44th European Solid State Device Research Conference, 2014

Dual Ground Plane EDMOS in ultrathin FDSOI for 5V energy management applications.
Proceedings of the 44th European Solid State Device Research Conference, 2014

Superior performance and Hot Carrier reliability of Strained FDSOI nMOSFETs for advanced CMOS technology nodes.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Remote carrier trapping in FinFETs with ONO buried layer: Temperature effects.
Microelectron. Reliab., 2013

Improved modeling of isolated EDMOS in advanced CMOS technologies.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

Novel back-biased UTBB lateral SCR for FDSOI ESD protections.
Proceedings of the European Solid-State Device Research Conference, 2013

Novel low temperature 3D wafer stacking technology for high density device integration.
Proceedings of the European Solid-State Device Research Conference, 2013

Why are SCE overestimated in FD-SOI MOSFETs?
Proceedings of the European Solid-State Device Research Conference, 2013

Magnetoresistance measurements and unusual mobilitiy behavior in FD MOSFETs.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
Deep-amorphization and solid-phase epitaxial regrowth processes for hybrid orientation technologies in SOI MOSFETs with thin body.
Microelectron. Reliab., 2012

Z<sup>2</sup>-FET used as 1-transistor high-speed DRAM.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

Multibranch mobility characterization: Evidence of carrier mobility enhancement by back-gate biasing in FD-SOI MOSFET.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2011
Comparison of low-temperature electrical characteristics of gate-all-around nanowire FETs, Fin FETs and fully-depleted SOI FETs.
Microelectron. Reliab., 2011

2007
High-temperature performance of state-of-the-art triple-gate transistors.
Microelectron. Reliab., 2007

2005
The G<sup>4</sup>-FET: a universal and programmable logic gate.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

SOI four-gate transistors (G<sup>4</sup>-FETs) for high voltage analog applications.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

A novel four-quadrant analog multiplier using SOI four-gate transistors (G<sup>4</sup>-FETs).
Proceedings of the 31st European Solid-State Circuits Conference, 2005

1999
Silicon on Insulator Technology.
Proceedings of the VLSI Handbook., 1999


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