Sopan Joshi

According to our database1, Sopan Joshi authored at least 7 papers between 2001 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2007
A Blind Calibration Technique to Correct Memory Errors in Amplifier-sharing Pipelined ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Compact modeling of on-chip ESD protection devices using Verilog-A.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005
Comprehensive ESD protection for RF inputs.
Microelectron. Reliab., 2005

2003
Simulator-independent compact modeling of vertical npn transistors for ESD and RF circuit simulation.
Microelectron. Reliab., 2003

A Verilog-A compact model for ESD protection NMOSTs.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002
On the Analysis, Design, and Modeling of Electrostatic Discharge Protection Devices for Analog and Radio -Frequency Integrated Circuits
PhD thesis, 2002

2001
Electrothermal model for simulation of bulk-Si and SOI diodes in ESD protection circuits.
Microelectron. Reliab., 2001


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