Soojung Ryu

According to our database¹, Soojung Ryu authored at least 59 papers between 2002 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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In proceedings

Article

PhD thesis

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On csauthors.net:

Bibliography

2024

USDN: A Unified Sample-wise Dynamic Network with Mixed-Precision and Early-Exit.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024

2022

ShortcutFusion: From Tensorflow to FPGA-Based Accelerator With a Reuse-Aware Memory Allocation for Shortcut Data.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2021

ShortcutFusion: From Tensorflow to FPGA-based accelerator with reuse-aware memory allocation for shortcut data.

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[DOI]

CoRR, 2021

GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration.

[BibT_eX]

[DOI]

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2018

Benzene: An Energy-Efficient Distributed Hybrid Cache Architecture for Manycore Systems.

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[DOI]

ACM Trans. Archit. Code Optim., 2018

2017

Dirty-Block Tracking in a Direct-Mapped DRAM Cache with Self-Balancing Dispatch.

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[DOI]

ACM Trans. Archit. Code Optim., 2017

Accelerating vector graphics on low-end device.

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[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2017

Towards an efficient data transfer on mobile device: A case study on ray-tracing.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2017

Fast stereoscopic rendering on mobile ray tracing GPU for virtual reality applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2017

2016

Dynamic clock synchronization scheme between voltage domains in multi-core architecture.

[BibT_eX]

[DOI]

Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Adaptive multi-rate ray sampling on mobile ray tracing GPU.

[BibT_eX]

[DOI]

Proceedings of the SIGGRAPH ASIA 2016, Macao, December 5-8, 2016, 2016

Tile binning and rendering for resolution independent graphics.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2016

PerfEPI: Parallel performance estimation with effective progress index.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2016

Selective multi-sample anti-aliasing for mobile vector graphics.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2016

iPAWS: Instruction-issue pattern-based adaptive warp scheduling for GPGPUs.

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[DOI]

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015

Tile-based path rendering for mobile device.

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[DOI]

Proceedings of the SIGGRAPH Asia 2015 Mobile Graphics and Interactive Applications, 2015

Latency tolerance techniques for real-time ray tracing on mobile computing platform.

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[DOI]

Proceedings of the SIGGRAPH Asia 2015 Mobile Graphics and Interactive Applications, 2015

An efficient hybrid ray tracing and rasterizer architecture for mobile GPU.

[BibT_eX]

[DOI]

Proceedings of the SIGGRAPH Asia 2015 Mobile Graphics and Interactive Applications, 2015

A mobile ray tracing engine with hybrid number representations.

[BibT_eX]

[DOI]

Proceedings of the SIGGRAPH Asia 2015 Mobile Graphics and Interactive Applications, 2015

Path rendering using winding number generator.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2015

Reorder buffer: an energy-efficient multithreading architecture for hardware MIMD ray traversal.

[BibT_eX]

[DOI]

Proceedings of the 7th Conference on High-Performance Graphics, 2015

2014

ULP-SRP: Ultra Low-Power Samsung Reconfigurable Processor for Biomedical Applications.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2014

Path rendering for high resolution mobile device.

[BibT_eX]

[DOI]

Proceedings of the SIGGRAPH Asia 2014 Mobile Graphics and Interactive Applications, 2014

An energy efficient hardware multithreading scheme for mobile ray tracing.

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[DOI]

Proceedings of the SIGGRAPH Asia 2014 Mobile Graphics and Interactive Applications, 2014

Two-AABB traversal for mobile real-time ray tracing.

[BibT_eX]

[DOI]

Proceedings of the SIGGRAPH Asia 2014 Mobile Graphics and Interactive Applications, 2014

Shading language compiler implementation for mobile ray tracing accelerator.

[BibT_eX]

[DOI]

Proceedings of the SIGGRAPH Asia 2014 Mobile Graphics and Interactive Applications, 2014

Full-stream architecture for ray tracing with efficient data transmission.

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[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Simulation-based memory dependence checker for CGRA-mapped code verification.

[BibT_eX]

[DOI]

Heejun Shim

Soojung Ryu

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Quantitative comparison of the power reduction techniques for samsung reconfigurable processor.

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[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

SimParallel: A high performance parallel SystemC simulator using hierarchical multi-threading.

[BibT_eX]

[DOI]

Moo-Kyoung Chung

Jun-Kyoung Kim

Soojung Ryu

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Tile boundary sharing for tile-based vector graphics rendering.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2014

Seeded region growing on multi-core system.

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[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2014

Low-power reconfigurable audio processor for mobile devices.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2014

Improving GPGPU resource utilization through alternative thread block scheduling.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

Energy-efficient scheduling for memory-intensive GPGPU workloads.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Energy efficient data transmission for ray tracing on mobile computing platform.

[BibT_eX]

[DOI]

Proceedings of the SIGGRAPH Asia 2013 Symposium on Mobile Graphics and Interactive Applications, 2013

Real-time ray tracing on future mobile computing platform.

[BibT_eX]

[DOI]

Proceedings of the SIGGRAPH Asia 2013 Symposium on Mobile Graphics and Interactive Applications, 2013

Hierarchical Verification Framework for Samsung Reconfigurable Processor Video System.

[BibT_eX]

[DOI]

Proceedings of the 14th International Workshop on Microprocessor Test and Verification, 2013

Reliable and energy-efficient 1MHz 0.4V dynamically reconfigurable SoC for ExG applications in 40nm LP CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A scalable scheduling algorithm for coarse-grained reconfigurable architecture.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2013

Efficient high throughput rate cross-correlation logic design for sign-bit reference waveforms.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2013

The acceleration of various multimedia applications on reconfigurable processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2013

Real-time ray tracing on coarse-grained reconfigurable processor.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Mobile GPU shader processor based on non-blocking Coarse Grained Reconfigurable Arrays architecture.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Adaptive compression for instruction code of Coarse Grained Reconfigurable Architectures.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Reevaluating the latency claims of 3D stacked memories.

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[DOI]

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Automatic code overlay generation and partially redundant code fetch elimination.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2012

Verification of CGRA Executable Code and Debugging of Memory Dependence Violation.

[BibT_eX]

[DOI]

Proceedings of the 13th International Workshop on Microprocessor Test and Verification, 2012

Case Study: Verification Framework of Samsung Reconfigurable Processor.

[BibT_eX]

[DOI]

Proceedings of the 13th International Workshop on Microprocessor Test and Verification, 2012

Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors.

[BibT_eX]

[DOI]

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Providing cost-effective on-chip network bandwidth in GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Efficient code compression for coarse grained reconfigurable architectures.

[BibT_eX]

[DOI]

Moo-Kyoung Chung

Yeon-Gon Cho

Soojung Ryu

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Design space exploration and implementation of a high performance and low area Coarse Grained Reconfigurable Processor.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Implementation of a volume rendering on coarse-grained reconfigurable multiprocessor.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

2011

An instruction-scheduling-aware data partitioning technique for coarse-grained reconfigurable architectures.

[BibT_eX]

[DOI]

Proceedings of the ACM SIGPLAN/SIGBED 2011 conference on Languages, 2011

2003

Storage Management for Embedded SIMD Processors.

[BibT_eX]

[DOI]

Soojung Ryu

PhD thesis, 2003

2002

Impulse noise removal on an embedded, low memory SIMD processor.

[BibT_eX]

[DOI]

Proceedings of the 14th International Conference on Digital Signal Processing, 2002

Soojung Ryu

Timeline

Legend:

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On csauthors.net:

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