Songwei Pei
Orcid: 0000-0002-7926-5727
According to our database1,
Songwei Pei
authored at least 27 papers
between 2009 and 2025.
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Bibliography
2025
AP-Net: Attention-fused volume and progressive aggregation for accurate stereo matching.
Neurocomputing, 2025
2024
Image Vis. Comput., 2024
Proceedings of the International Joint Conference on Neural Networks, 2024
Towards High-Accuracy Point Cloud Registration with Channel Self-attention and Angle Invariance.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2024, 2024
2023
Proceedings of the Neural Information Processing - 30th International Conference, 2023
PO-DARTS: Post-optimizing the Architectures Searched by Differentiable Architecture Search Algorithms.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2023, 2023
2021
A parallel sparse triangular solve algorithm based on dependency elimination of the solution vector.
Clust. Comput., 2021
2020
A variation tolerant scheme for memristor crossbar based neural network designs via two-phase weight mapping and memristor programming.
Future Gener. Comput. Syst., 2020
On Improving Fault Tolerance of Memristor Crossbar Based Neural Network Designs by Target Sparsifying.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2018
2017
Proceedings of the 26th IEEE Asian Test Symposium, 2017
2016
A Cost-Effective Energy Optimization Framework of Multicore SoCs Based on Dynamically Reconfigurable Voltage-Frequency Islands.
ACM Trans. Design Autom. Electr. Syst., 2016
Statistical energy optimization on voltage-frequency island based MPSoCs in the presence of process variations.
Microelectron. J., 2016
2015
Corrigendum to "Fast and scalable lock methods for video coding on many-core architecture" [J. Visual Communication and Image Representation 25(7) (2014) 1758-1762].
J. Vis. Commun. Image Represent., 2015
An on-chip frequency programmable test clock generation and application method for small delay defect detection.
Integr., 2015
On optimizing system energy of multi-core SoCs based on dynamically reconfigurable voltage-frequency island.
Proceedings of the VLSI Design, Automation and Test, 2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Enhanced LCCG: A novel test clock generation scheme for faster-than-at-speed delay testing.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
J. Vis. Commun. Image Represent., 2014
Variation-aware statistical energy optimization on voltage-frequency island based MPSoCs under performance yield constraints.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
2011
Proceedings of the 29th IEEE VLSI Test Symposium, 2011
2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
Flip-Flop Selection for Transition Test Pattern Reduction Using Partial Enhanced Scan.
Proceedings of the 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing, 2009
Proceedings of the Eighteentgh Asian Test Symposium, 2009