Song Guo

According to our database, Song Guo authored at least 14 papers between 2010 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

面向定制结构的稀疏矩阵分块方法 (Sparse Matrix Blocking Method for Custom Architecture).

Guiming Wu, Miao Wang, Xianghui Xie, Yong Dou, Song Guo

计算机科学, 2015

A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme.

Song Guo, Yong Dou, Yuanwu Lei, Guiming Wu

IEICE Electron. Express, 2015

An efficient multi-standard QC-LDPC decoder based on the row-layered decoding algorithm.

Song Guo, Yong Dou, Yuanwu Lei, Rongchun Li, Yu Li

IEICE Electron. Express, 2015

Accelerating Molecular Dynamics Simulations on Heterogeneous Architecture.

Yueqing Wang, Yong Dou, Song Guo, Yuanwu Lei, Baofeng Li, Qiang Wang

Proceedings of the Computer Engineering and Technology - 19th CCF Conference, 2015

Designing Parallel Sparse Matrix Transposition Algorithm Using ELLPACK-R for GPUs.

Song Guo, Yong Dou, Yuanwu Lei, Qiang Wang, Fei Xia, Jianning Chen

Proceedings of the Computer Engineering and Technology - 19th CCF Conference, 2015

2014

Supernodal sparse Cholesky factorization on graphics processing units.

Dan Zou, Yong Dou, Song Guo, Rongchun Li, Lin Deng

Concurr. Comput. Pract. Exp., 2014

CPU-GPU hybrid parallel strategy for cosmological simulations.

Yueqing Wang, Yong Dou, Song Guo, Yuanwu Lei, Dan Zou

Concurr. Comput. Pract. Exp., 2014

A high throughput K-best detector on FPGA.

Zhiqiang Liu, Jingfei Jiang, Yong Dou, Rongchun Li, Song Guo

Proceedings of the IEEE International Black Sea Conference on Communications and Networking, 2014

2013

High performance sparse matrix-vector multiplication on FPGA.

Dan Zou, Yong Dou, Song Guo, Shi-Ce Ni

IEICE Electron. Express, 2013

A multi-standard efficient column-layered LDPC decoder for Software Defined Radio on GPUs.

Rongchun Li, Jie Zhou, Yong Dou, Song Guo, Dan Zou, Shi Wang

Proceedings of the 14th IEEE Workshop on Signal Processing Advances in Wireless Communications, 2013

2012

Design and Implementation of the Parameterized Multi-Standard High-Throughput Radix-4 Viterbi Decoder on FPGA.

Rongchun Li, Yong Dou, Yuanwu Lei, Shi-Ce Ni, Song Guo

IEICE Trans. Commun., 2012

2011

Special-purposed VLIW architecture for IEEE-754 quadruple precision elementary functions on FPGA.

Yuanwu Lei, Yong Dou, Li Shen, Jie Zhou, Song Guo

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

FPGA Implementation of Variable-Precision Floating-Point Arithmetic.

Yuanwu Lei, Yong Dou, Song Guo, Jie Zhou

Proceedings of the Advanced Parallel Processing Technologies - 9th International Symposium, 2011

2010

FPGA accelerating double/quad-double high precision floating-point applications for ExaScale computing.

Yong Dou, Yuanwu Lei, Guiming Wu, Song Guo, Jie Zhou, Li Shen

Proceedings of the 24th International Conference on Supercomputing, 2010