Soheil Salehi
Orcid: 0000-0001-5998-8795
According to our database1,
Soheil Salehi
authored at least 46 papers
between 2015 and 2024.
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Bibliography
2024
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024
Transforming Engineering Education Using Generative AI and Digital Twin Technologies.
CoRR, 2024
Proceedings of the 33rd USENIX Security Symposium, 2024
Sensitivity Analysis of SOT-MTJs to Manufacturing Process Variation: A Hardware Security Perspective.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024
Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Educational Tool-spaces for Convolutional Neural Network FPGA Design Space Exploration Using High-Level Synthesis.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
2023
ACM Trans. Embed. Comput. Syst., 2023
HW-V2W-Map: Hardware Vulnerability to Weakness Mapping Framework for Root Cause Analysis with GPT-assisted Mitigation Suggestion.
CoRR, 2023
Securing AI Hardware: Challenges in Detecting and Mitigating Hardware Trojans in ML Accelerators.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Energy-/Area-Efficient Spintronic ANN-based Digit Recognition via Progressive Modular Redundancy.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the International Conference on Machine Learning and Applications, 2023
Leveraging Firmware Reverse Engineering for Stealthy Sensor Attacks via Binary Modification.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
Machine Learning for Intrusion Detection: Stream Classification Guided by Clustering for Sustainable Security in IoT.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
2022
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
FANDEMIC: Firmware Attack Construction and Deployment on Power Management Integrated Circuit and Impacts on IoT Applications.
Proceedings of the 29th Annual Network and Distributed System Security Symposium, 2022
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
LOCK&ROLL: deep-learning power side-channel attack mitigation using emerging reconfigurable devices and logic locking.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
Ontology-Driven Framework for Trend Analysis of Vulnerabilities and Impacts in IoT Hardware.
Proceedings of the 15th IEEE International Conference on Semantic Computing, 2021
Embedded STT-MRAM Energy Analysis for Intermittent Applications using Mean Standby Duration.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Securing Hardware via Dynamic Obfuscation Utilizing Reconfigurable Interconnect and Logic Blocks.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Evaluation of Machine Learning-based Detection against Side-Channel Attacks on Autonomous Vehicle.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
IEEE Trans. Emerg. Top. Comput., 2020
2019
Self-Organized Sub-bank SHE-MRAM-based LLC: An energy-efficient and variation-immune read and write architecture.
Integr., 2019
CoRR, 2019
Mixed-Signal Spin/Charge Reconfigurable Array for Energy-Aware Compressive Signal Processing.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019
An Ultra-Low Power Spintronic Stochastic Spiking Neuron with Self-Adaptive Discrete Sampling.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
MRAM-Based Stochastic Oscillators for Adaptive Non-Uniform Sampling of Sparse Signals in IoT Applications.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
AQuRate: MRAM-based Stochastic Oscillator for Adaptive Quantization Rate Sampling of Sparse Signals.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Virtualized Active Learning for Undergraduate Engineering Disciplines (VALUED): A Pilot in a Large Enrollment STEM Classroom.
Proceedings of the IEEE Frontiers in Education Conference, 2019
Proceedings of the IEEE Frontiers in Education Conference, 2019
2018
Elevating Learner Achievement Using Formative Electronic Lab Assessments in the Engineering Laboratory: A Viable Alternative to Weekly Lab Reports.
IEEE Trans. Educ., 2018
SLIM-ADC: Spin-based Logic-In-Memory Analog to Digital Converter leveraging SHE-enabled Domain Wall Motion devices.
Microelectron. J., 2018
Energy-Aware Adaptive Rate and Resolution Sampling of Spectrally Sparse Signals Leveraging VCMA-MTJ Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
BGIM: Bit-Grained Instant-on Memory Cell for Sleep Power Critical Mobile Applications.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
2017
Survey of STT-MRAM Cell Design Strategies: Taxonomy and Sense Amplifier Tradeoffs for Resiliency.
ACM J. Emerg. Technol. Comput. Syst., 2017
Variation-immune resistive Non-Volatile Memory using self-organized sub-bank circuit designs.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Process variation immune and energy aware sense amplifiers for resistive non-volatile memories.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015