Soheil Nazar Shahsavani
Orcid: 0000-0001-5159-9103
According to our database1,
Soheil Nazar Shahsavani
authored at least 10 papers
between 2015 and 2023.
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Bibliography
2023
Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis.
ACM Trans. Reconfigurable Technol. Syst., June, 2023
2021
A Variation-aware Hold Time Fixing Methodology for Single Flux Quantum Logic Circuits.
ACM Trans. Design Autom. Electr. Syst., 2021
NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021
2020
A Timing Uncertainty-Aware Clock Tree Topology Generation Algorithm for Single Flux Quantum Circuits.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
TDP-ADMM: A Timing Driven Placement Approach for Superconductive Electronic Circuits Using Alternating Direction Method of Multipliers.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
A Hyper-Parameter Based Margin Calculation Algorithm for Single Flux Quantum Logic Cells.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
A placement algorithm for superconducting logic circuits based on cell grouping and super-cell placement.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2015
A heuristic machine learning-based algorithm for power and thermal management of heterogeneous MPSoCs.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015