Sohaib Majzoub

Orcid: 0000-0003-3196-2635

According to our database1, Sohaib Majzoub authored at least 32 papers between 2002 and 2024.

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Bibliography

2024
Chaos in Inter-State-Controlled RLC Networks.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

Using Intermittent Chaotic Clocks to Secure Cryptographic Chips.
CoRR, 2024

Dementia Deterioration Prediction Using Machine Learning.
Proceedings of the 2024 8th International Conference on Cloud and Big Data Computing, 2024

2023
Epilepsy Detection with Multi-channel EEG Signals Utilizing AlexNet.
Circuits Syst. Signal Process., November, 2023

Fast Electrochemical Impedance Measurement and Classification System Based on Machine Learning Algorithms.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

Using Electrical Impedance Tomography and Machine Learning for Breast Cancer Detection.
Proceedings of the 16th International Conference on Developments in eSystems Engineering, 2023

2022
LVSiM Simulator.
Dataset, May, 2022

Chaotic Clock Driven Cryptographic Chip: Towards a DPA Resistant AES Processor.
IEEE Trans. Emerg. Top. Comput., 2022

Hardware Acceleration of the STRIKE String Kernel Algorithm for Estimating Protein to Protein Interactions.
IEEE ACM Trans. Comput. Biol. Bioinform., 2022

Using Non-Autonomous Chaotic Clocks to Drive CPA-Resistant AES Cryptographic Chips.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Rapid Design-Space Exploration for Low-Power Manycores Under Process Variation Utilizing Machine Learning.
IEEE Access, 2022

Time-Frequency Design of a Multi-Sine Excitation With Random Phase and Controllable Amplitude for (Bio) Impedance Measurements.
IEEE Access, 2022

Impedance Measurement Using Wide-Band Signals.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
A systematic literature review on hardware implementation of artificial intelligence algorithms.
J. Supercomput., 2021

Pinched hysteresis loops in non-linear resonators.
IET Circuits Devices Syst., 2021

2020
Pinched Hysteresis Loops In Nonlinear Resonators.
CoRR, 2020

2019
System-Level Sub-20 nm Planar and FinFET CMOS Delay Modelling for Supply and Threshold Voltage Scaling Under Process Variation.
J. Low Power Electron., 2019

Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators.
Circuits Syst. Signal Process., 2019

Energy Optimization for Large-Scale 3D Manycores in the Dark-Silicon Era.
IEEE Access, 2019

2015
Reducing random-dopant fluctuation impact using footer transistors in many-core systems.
Integr., 2015

2013
Reducing random-dopant fluctuation impact on core-speed and power variability in many-core platforms.
Proceedings of the 8th International Design and Test Symposium, 2013

2012
MorphoSys reconfigurable hardware for cryptography: the twofish case.
J. Supercomput., 2012

2011
Instruction-Based Voltage Scaling for Power Reduction in SIMD MPSoCs.
J. Low Power Electron., 2011

RTL delay macro-modeling with Vt and Vdd variability.
Proceedings of the 6th IEEE International Design and Test Workshop, 2011

2010
Energy Optimization for Many-Core Platforms: Communication and PVT Aware Voltage-Island Formation and Voltage Selection Algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Voltage island design in multi-core SIMD processors.
Proceedings of the 5th International Design and Test Workshop, 2010

2009
Removal-Cost Method: An efficient voltage selection algorithm for multi-core platforms under PVT.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Simultaneous PVT-tolerant voltage-island formation and core placement for thousand-core platforms.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

PVT variation impact on voltage island formation in MPSoC design.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2007
Instruction-Set Extension for Cryptographic Applications on Reconfigurable Platform.
J. Circuits Syst. Comput., 2007

Mapping and Performance Analysis of Lookup Table Implementations on Reconfigurable Platform.
Proceedings of the 2007 IEEE/ACS International Conference on Computer Systems and Applications (AICCSA 2007), 2007

2002
2D and 3D Computer Graphics Algorithms under MORPHOSYS.
Proceedings of the Field-Programmable Logic and Applications, 2002


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