Smita Bakshi

ACM Trans. Design Autom. Electr. Syst., 2001

1999

Partitioning and pipelining for performance-constrained hardware/software systems.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 1999

Automatic Insertion of Gated Clocks at Register Transfer Level.

[BibT_eX]

[DOI]

Nithya Raghavan

Venkatesh Akella

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1998

Hierarchical pipelining for behaviors, loops, and operations.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1997

Model refinement for hardware-software codesign.

[BibT_eX]

[DOI]

Jie Gong

ACM Trans. Design Autom. Electr. Syst., 1997

A Scheduling and Pipelining Algorithm for Hardware/Software Systems.

[BibT_eX]

[DOI]

Proceedings of the 10th International Symposium on System Synthesis, 1997

Hardware/Software Partitioning and Pipelining.

[BibT_eX]

[DOI]

Proceedings of the 34st Conference on Design Automation, 1997

1996

Component selection for high-performance pipelines.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 1996

Clock optimization for high-performance pipelined design.

[BibT_eX]

[DOI]

Hsiao-Ping Juan

Proceedings of the conference on European design automation, 1996

Component selection in resource shared and pipelined DSP applications.

[BibT_eX]

[DOI]

Hsiao-Ping Juan

Proceedings of the conference on European design automation, 1996

1995

A memory selection algorithm for high-performance pipelines.

[BibT_eX]

[DOI]

Proceedings of the Proceedings EURO-DAC'95, 1995

1994

Design exploration for high-performance pipelines.

[BibT_eX]

[DOI]

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

A component selection algorithm for high-performance pipelines.

[BibT_eX]

[DOI]