Slawomir Cichon

According to our database, Slawomir Cichon authored at least 4 papers between 2005 and 2017.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2017

H.265 Inverse Transform FPGA implementation in Impulse C.

Slawomir Cichon, Marek Gorgon

Proceedings of the 2017 Federated Conference on Computer Science and Information Systems, 2017

2013

FPGA-based DVCPRO HD Decoder Implementation Using Impulse C.

Slawomir Cichon, Marek Gorgon

Comput. Sci., 2013

2006

Handel-C Design Enhancement for FPGA-Based DV Decoder.

Slawomir Cichon, Marek Gorgon, Miroslaw Pac

Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005

Real-time Handel-C Based Implementation of DV Decoder.

Marek Gorgon, Slawomir Cichon, Miroslaw Pac

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005