Slavisa Jovanovic

Orcid: 0000-0001-6459-7043

According to our database1, Slavisa Jovanovic authored at least 30 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

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Bibliography

2023
A Survey of Hardware Self-Organizing Maps.
IEEE Trans. Neural Networks Learn. Syst., November, 2023

ECG Classification Using an Optimal Temporal Convolutional Network for Remote Health Monitoring.
Sensors, February, 2023

Attention-Enabled Lightweight Neural Network Architecture for Detection of Action Unit Activation.
IEEE Access, 2023

Embedded 1D Convolutional Network based ECG Classification Platform for Remote Health Monitoring.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

Lightweight Attention-Based CNN on Embedded Systems for Emotion Recognition.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
An FPGA-Based Residual Recurrent Neural Network for Real-Time Video Super-Resolution.
IEEE Trans. Circuits Syst. Video Technol., 2022

Detection of Chaos Using Reservoir Computing Approach.
IEEE Access, 2022

ECG Signal Classification Using Temporal Convolutional Network.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

An Explainable and Reliable Facial Expression Recognition System for Remote Health Monitoring.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
A Hybrid Explainable AI Framework Applied to Global and Local Facial Expression Recognition.
Proceedings of the IEEE International Conference on Imaging Systems and Techniques, 2021

Novel Reservoir Computing Approach for the Detection of Chaos.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Scalable, dynamic and growing hardware self-organizing architecture for real-time vector quantization.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Open-Switch Fault-Tolerant Operation of a Two-Stage Buck/Buck-Boost Converter With Redundant Synchronous Switch for PV Systems.
IEEE Trans. Ind. Electron., 2019

A Multi-Application, Scalable and Adaptable Hardware SOM Architecture.
Proceedings of the International Joint Conference on Neural Networks, 2019

2018
A scalable and adaptable hardware NoC-based self organizing map.
Microprocess. Microsystems, 2018

High performance scalable hardware SOM architecture for real-time vector quantization.
Proceedings of the IEEE International Conference on Image Processing, 2018

2016
A Scalable Flexible SOM NoC-Based Hardware Architecture.
Proceedings of the Advances in Self-Organizing Maps and Learning Vector Quantization, 2016

A hardware configurable self-organizing map for real-time color quantization.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2014
Efficient relocation of variable-sized hardware tasks for FPGA-based adaptive systems.
Proceedings of the 26th International Conference on Microelectronics, 2014

2013
Modeling and FPGA implementation of reconfigurable transcoder for real time video adaptation.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

Methodology and reconfigurable architecture for effective placement of variable-size hardware tasks.
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013

2010
Behavioral modeling and C-VHDL co-simulation of Network on Chip on FPGA for Education.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010

2009
Architecture reconfigurable de système embarqué auto-organisé. (Self-organizing embedded reconfigurable system architecture).
PhD thesis, 2009

CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs.
Microprocess. Microsystems, 2009

A new deadlock-free fault-tolerant routing algorithm for NoC interconnections.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
A new high-performance scalable dynamic interconnection for FPGA-based reconfigurable systems.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

A New Self-Managing Hardware Design Approach for FPGA-based Reconfigurable Systems.
Proceedings of the Reconfigurable Computing: Architectures, 2008

2007
A Dynamic Communication Structure for Dynamically Reconfigurable FPGAs.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

CuNoC: A Scalable Dynamic NoC for Dynamically Reconfigurable FPGAs.
Proceedings of the FPL 2007, 2007

A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007


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