Siyuan Lu

Orcid: 0000-0002-8639-3081

Affiliations:
  • Nanjing University, School of Electronic Science and Engineering, Nanjing, China


According to our database1, Siyuan Lu authored at least 15 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Fast and Accurate FSA System Using ELBERT: An Efficient and Lightweight BERT.
IEEE Trans. Signal Process., 2023

2022
Fast and Accurate FSA System Using ELBERT: An Efficient and Lightweight BERT.
CoRR, 2022

Forecasting Stock Indexes with Metabolic DWT and MWA-GM(1,1).
Proceedings of the 14th International Conference on Wireless Communications and Signal Processing, 2022

Accelerating NLP Tasks on FPGA with Compressed BERT and a Hardware-Oriented Early Exit Method.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

View Dialogue in 2D: A Two-stream Model in Time-speaker Perspective for Dialogue Summarization and beyond.
Proceedings of the 29th International Conference on Computational Linguistics, 2022

2021
Low-Latency Hardware Accelerator for Improved Engle-Granger Cointegration in Pairs Trading.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Elbert: Fast Albert with Confidence-Window Based Early Exit.
Proceedings of the IEEE International Conference on Acoustics, 2021

2020
Efficient Precision-Adjustable Architecture for Softmax Function in Deep Learning.
IEEE Trans. Circuits Syst., 2020

Hardware Accelerator for Multi-Head Attention and Position-Wise Feed-Forward in the Transformer.
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

Hardware Accelerator for Engle-Granger Cointegration in Pairs Trading.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

LSTM-Based Quantitative Trading Using Dynamic K-Top and Kelly Criterion.
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020

2019
A Hardware-Oriented and Memory-Efficient Method for CTC Decoding.
IEEE Access, 2019

Training Deep Neural Networks Using Posit Number System.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

A Low-Latency and Low-Complexity Hardware Architecture for CTC Beam Search Decoding.
Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

2018
A High-Speed and Low-Complexity Architecture for Softmax Function in Deep Learning.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018


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