Sivaprakasam Suresh

According to our database1, Sivaprakasam Suresh authored at least 10 papers between 1994 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2007
A novel approach to the placement and routing problems for field programmable gate arrays.
Appl. Soft Comput., 2007

Impact of NBTI on FPGAs.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Variation Impact on SER of Combinational Circuits.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2004
An Evolutionary Algorithm for Automatic Spatial Partitioning in Reconfigurable Environments.
Proceedings of the MICAI 2004: Advances in Artificial Intelligence, 2004

2003
On-Line Location of Multiple Faults in LUT Based Reconfigurable Systems.
Proceedings of the International Conference on VLSI, 2003

A Parallel Genetic Approach to the Placement Problem for Field Programmable Gate Arrays.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

A Parallel Evolutionary Approach to Spatial Partitioning in Reconfigurable Environments.
Proceedings of the 1st Indian International Conference on Artificial Intelligence, 2003

An enhanced evolutionary approach to spatial partitioning for reconfigurable environments.
Proceedings of the IEEE Congress on Evolutionary Computation, 2003

2002
A novel three phase parallel genetic approach to routing for field programmable gate arrays.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

1994
<i>I<sub>DDQ</sub></i> Measurement Based Diagnosis of Bridging Faults in Full Scan Circuits.
Proceedings of the Seventh International Conference on VLSI Design, 1994


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