Sirus Sadughi

According to our database, Sirus Sadughi authored at least 6 papers between 2000 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

A fully linear 5.2 GHz - 5.8 GHz digitally controlled oscillator in 65-nm CMOS technology.

Siavash Heydarzadeh, Pooya Torkzadeh, Sirus Sadughi

Microelectron. J., 2019

A novel design of hybrid-time-interleaved current steering digital to analog converter and its behavioral simulation considering non-ideal effects.

Hossein Sariri, Pooya Torkzadeh, Sirus Sadughi

Integr., 2019

2016

A Novel Architecture of Pseudorandom Dithered MASH Digital Delta-Sigma Modulator with Lower Spur.

Seyed Ali Sadat Noori, Ebrahim Frashidi, Sirus Sadughi

J. Circuits Syst. Comput., 2016

2013

A 4-Bit, 1.6 GS/s Low Power Flash ADC, Based on Offset Calibration and Segmentation.

Mohammad Chahardori, Mohammad Sharifkhani, Sirus Sadughi

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A low power 1.2 GS/s 4-bit flash ADC in 0.18 µm CMOS.

Mohammad Chahardori, Mohammad Sharifkhani, Sirus Sadughi

Proceedings of the East-West Design & Test Symposium, 2013

2000

An intelligent framework for designing analog circuits based on hybrid reasoning.

Farhad Razaghian, Sirus Sadughi, Kambiz Badie

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000