Simonjit Dutta

According to our database1, Simonjit Dutta authored at least 4 papers between 1995 and 1999.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

1999
Control Flow Prediction Schemes for Wide-Issue Superscalar Processors.
IEEE Trans. Parallel Distributed Syst., 1999

1998
The Misprediction Recovery Cache.
Int. J. Parallel Program., 1998

1996
Integrating a Misprediction Recovery Cache (MRC) into a Superscalar Pipeline.
Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, 1996

1995
Control flow prediction with tree-like subgraphs for superscalar processors.
Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995


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