Simone Casale Brunet

Endri Bezati

J. Signal Process. Syst., 2016

High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Performance estimation of program partitions on multi-core platforms.

[BibT_eX]

[DOI]

Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

High-Precision Performance Estimation of Dynamic Dataflow Programs.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Programming Models and Methods for Heterogeneous Parallel Embedded Systems.

[BibT_eX]

[DOI]

Endri Bezati

Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

A Partition Scheduler Model for Dynamic Dataflow Programs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science 2016, 2016

Trace-based manycore partitioning of stream-processing applications.

[BibT_eX]

[DOI]

Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

High-level system synthesis and optimization of dataflow programs for MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015

Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science, 2015

2014

Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case.

[BibT_eX]

[DOI]

Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Characterizing communication behavior of dataflow programs using trace analysis.

[BibT_eX]

[DOI]

Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms.

[BibT_eX]

[DOI]

Damien de Saint Jorre

Claudio Alberti

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

A methodology for optimizing buffer sizes of dynamic dataflow fpgas implementations.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2014

TURNUS: An open-source design space exploration framework for dynamic stream programs.

[BibT_eX]

[DOI]

Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control.

[BibT_eX]

[DOI]

Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

Dataflow machines.

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[DOI]

Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

2013

Methods to explore design space for MPEG RMC codec specifications.

[BibT_eX]

[DOI]

Signal Process. Image Commun., 2013

Partitioning and optimization of high level stream applications for multi clock domain architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Buffer optimization based on critical path analysis of a dataflow program design.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

TURNUS: A design exploration framework for dataflow system design.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Design space exploration of high level stream programs on parallel architectures: A focus on the buffer size minimization and optimization problem.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013

A Lego Mindstorms NXT experiment for Model Predictive Control education.

[BibT_eX]

[DOI]

Massimo Canale

Proceedings of the 12th European Control Conference, 2013

Dataflow program analysis and refactoring techniques for design space exploration: MPEG-4 AVC/H.264 decoder implementation case study.

[BibT_eX]

[DOI]

Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Design space exploration and implementation of RVC-CAL applications using the TURNUS framework.

[BibT_eX]

[DOI]

Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems.

[BibT_eX]

[DOI]

Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Representing Guard Dependencies in Dataflow Execution Traces.

[BibT_eX]

[DOI]

Proceedings of the Fifth International Conference on Computational Intelligence, 2013

Systems design space exploration by serial dataflow program execution.

[BibT_eX]

[DOI]

Proceedings of the 2013 Asilomar Conference on Signals, 2013

Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications.

[BibT_eX]

[DOI]

Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012

Profiling of Dataflow Programs Using Post Mortem Causation Traces.

[BibT_eX]

[DOI]