Simon Van Beek

According to our database1, Simon Van Beek authored at least 15 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Extremely Scaled Perpendicular SOT-MRAM Array Integration on 300mm Wafer.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
MTJ degradation in multi-pillar SOT-MRAM with selective writing.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

2022
Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

MTJ degradation in SOT-MRAM by self-heating-induced diffusion.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021
Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application.
Proceedings of the IEEE International Memory Workshop, 2021

2020
Understanding and empirical fitting the breakdown of MgO in end-of-line annealed MTJs.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Array-Based Statistical Characterization of CMOS Degradation Modes and Modeling of the Time-Dependent Variability Induced by Different Stress Patterns in the {V<sub>G</sub>, V<sub>D</sub>} bias space.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

2018
SOT-MRAM 300mm integration for low power and ultrafast embedded memories.
CoRR, 2018

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Experimental extraction of BEOL composite equivalent thermal conductivities for application in self-heating simulations.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

Study of breakdown in STT-MRAM using ramped voltage stress and all-in-one maximum likelihood fit.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2015
Four point probe ramped voltage stress as an efficient method to understand breakdown of STT-MRAM MgO tunnel junctions.
Proceedings of the IEEE International Reliability Physics Symposium, 2015


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