Simon M. Louwsma

According to our database1, Simon M. Louwsma authored at least 8 papers between 2004 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A 0.2 - 8 MS/s 10b flexible SAR ADC achieving 0.35 - 2.5 fJ/conv-step and using self-quenched dynamic bias comparator.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 4MS/s 10b SAR ADC with integrated Class-A buffers in 65nm CMOS with near rail-to-rail input using a single 1.2V supply.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2017
An energy reduced sampling technique applied to a 10b 1MS/s SAR ADC.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

Range pre-selection sampling technique to reduce input drive energy for SAR ADCs.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2008
A 1.35 GS/s, 10 b, 175 mW Time-Interleaved AD Converter in 0.13 µm CMOS.
IEEE J. Solid State Circuits, 2008

2007
A Time-Interleaved Track & hold in 0.13 μm CMOS sub-sampling a 4 GHz signal with 43 dB SNDR.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2004
A CMOS switched transconductor mixer.
IEEE J. Solid State Circuits, 2004

A 1.6 GS/s, 16 times interleaved track & hold with 7.6 ENOB in 0.12 μm CMOS [ADC applications].
Proceedings of the 33rd European Solid-State Circuits Conference, 2004


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