Sih-Sian Wu
Orcid: 0000-0002-1790-5557
According to our database1,
Sih-Sian Wu
authored at least 17 papers
between 2010 and 2021.
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Bibliography
2021
Hardware- and Memory-Efficient Architecture for Disparity Estimation of Large Label Counts.
IEEE Trans. Circuits Syst. Video Technol., 2021
CMWMF: Constant Memory Architecture of Weighted Mode/Median Filter for Extremely Large Label Depth Refinement.
IEEE Trans. Circuits Syst. Video Technol., 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
2018
Accurate and Bandwidth Efficient Architecture for CNN-based Full-HD Super-Resolution.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 2018 IEEE International Conference on Multimedia and Expo, 2018
2017
Proceedings of the 19th IEEE International Workshop on Multimedia Signal Processing, 2017
2016
Efficient Hardware Architecture for Large Disparity Range Stereo Matching Based on Belief Propagation.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016
3-D perception enhancement in autostereoscopic TV by depth cue for 3-D model interaction.
Proceedings of the IEEE International Conference on Consumer Electronics, 2016
2015
23.2 A 1920×1080 30fps 611 mW five-view depth-estimation processor for light-field applications.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2011
Model-Driven Design and Generation of New Multi-Facet Arbiters: From the Design Model to the Hardware Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
2010
Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010
New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model.
Proceedings of the 47th Design Automation Conference, 2010