Sidhartha Sankar Rout
Orcid: 0000-0002-7890-0143
According to our database1,
Sidhartha Sankar Rout
authored at least 19 papers
between 2015 and 2023.
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Bibliography
2023
2DMAC: A Sustainable and Efficient Medium Access Control Mechanism for Future Wireless NoCs.
ACM J. Emerg. Technol. Comput. Syst., July, 2023
ReDeSIGN: Reuse of Debug Structures for Improvement in Performance Gain of NoC Based MPSoCs.
IEEE Trans. Emerg. Top. Comput., 2023
2022
IEEE Trans. Emerg. Top. Comput., 2022
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
2020
Security Threats in Channel Access Mechanism of Wireless NoC and Efficient Countermeasures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
Efficient Router Architecture for Trace Reduction During NoC Post-Silicon Validation.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019
2018
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018
On-Chip Wireless Channel Propagation: Impact of Antenna Directionality and Placement on Channel Performance.
Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018
Enabling Reliable High Throughput On-chip Wireless Communication for Many Core Architectures.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018
2015
Reliability Enhancement of SoCs Based on Dynamic Memory Access Profiling in Conjunction with PVT Monitoring.
Proceedings of the 28th International Conference on VLSI Design, 2015