Sidhartha Dash

According to our database¹, Sidhartha Dash authored at least 3 papers between 2017 and 2024.

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2024

Z-shaped gate tunnel FET with graphene channel: An extensive investigation of its analog and linearity performance.

[BibT_eX]

[DOI]

Microelectron. J., 2024

2018

Analytical modelling of work-function modulated delta-doped TFET to improve analogue performance.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2018

2017

A 2-D analytical model for cylindrical gate tunnel FET (CG-TFET) based on center potential.

[BibT_eX]

[DOI]

Turkish J. Electr. Eng. Comput. Sci., 2017