Sidharth Rao

According to our database, Sidharth Rao authored at least 8 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays.

W. Kim, Valerio Pica, N. Jossart, Farrukh Yasin, Kurt Wostyn, S. Couet, Sidharth Rao

Proceedings of the IEEE International Memory Workshop, 2024

2023

Magnetic Coupling Based Test Development for Contact and Interconnect Defects in STT-MRAMs.

Sicong Yuan, Ziwei Zhang, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui

Proceedings of the IEEE International Test Conference, 2023

Device-Aware Test for Back-Hopping Defects in STT-MRAMs.

Sicong Yuan, Mottaqiallah Taouil, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, Said Hamdioui

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2021

STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application.

Sidharth Rao, Woojin Kim, Simon Van Beek, Shreya Kundu, Manu Perumkunnil, Stefan Cosemans, Farrukh Yasin, Sebastien Couet, Robert Carpenter, Barry J. O'Sullivan, Shamin H. Sharifi, N. Jossart, Laurent Souriau, Ludovic Goux, Dimitri Crotti, Gouri Sankar Kar

Proceedings of the IEEE International Memory Workshop, 2021

2019

Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM.

Kevin Garello, Farrukh Yasin, Hubert Hody, S. Couet, Laurent Souriau, Shamin H. Sharifi, Johan Swerts, Robert Carpenter, Sidharth Rao, Wonsub Kim, J. Wu, K. K. V. Sethu, M. Pak, N. Jossart, D. Crotti, Arnaud Furnémont, Gouri Sankar Kar

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2018

SOT-MRAM 300mm integration for low power and ultrafast embedded memories.

Kevin Garello, Farrukh Yasin, S. Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, N. Jossart, Kris Croes, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Furnémont, Pietro Gambardella, Gouri Sankar Kar

CoRR, 2018

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories.

Kevin Garello, Kevin Garello Yasin, S. Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, Kris Croes, N. Jossart, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Fumemont, Pietro Gambardella, Gouri Sankar Kar

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown.

Barry J. O'Sullivan, Simon Van Beek, Philippe J. Roussel, Sidharth Rao, Wonsub Kim, S. Couet, Johan Swerts, Farrukh Yasin, Dimitri Crotti, Dimitri Linten, Gouri Sankar Kar

Proceedings of the IEEE International Reliability Physics Symposium, 2018