Siddika Berna Örs Yalçin

Orcid: 0000-0003-0851-8501

Affiliations:
  • Istanbul Technical University, Turkey


According to our database1, Siddika Berna Örs Yalçin authored at least 70 papers between 1999 and 2024.

Collaborative distances:

Timeline

2000
2005
2010
2015
2020
0
1
2
3
4
5
6
7
8
9
10
1
2
2
1
1
1
1
1
2
1
1
1
1
2
2
3
5
1
3
2
1
4
9
1
5
2
1
3
1
5
3
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Model-based, fully simulated, system-level power consumption estimation of IoT devices.
Microprocess. Microsystems, 2024

Model-Based Design of a Visual Cryptography Scheme and Implementation on an FPGA.
Proceedings of the 32nd Signal Processing and Communications Applications Conference, 2024

Secure Boot Design for a RISC-V Based SoC and Implementation on an FPGA.
Proceedings of the 32nd Signal Processing and Communications Applications Conference, 2024

2023
Optimizing Data Availability and Utilization in Deep Learning Accelerator SoCs.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

Lookupx: Next-Generation Quantization and Lookup Techniques for Empowering Performance and Energy Efficiency.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
Analysing the potential of transport triggered architecture for lattice-based cryptography algorithms.
Int. J. Embed. Syst., 2022

Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness Detection.
IEEE Access, 2022

Clutter Removal for Ground Penetrating Radars on FPGA: Design and Implementation.
Proceedings of the 30th Signal Processing and Communications Applications Conference, 2022

Implementation of a SoC by Using lowRISC Architecture on an FPGA for Image Filtering Applications.
Proceedings of the 30th Signal Processing and Communications Applications Conference, 2022

RPL Authenticated Mode Evaluation: Authenticated Key Exchange and Network Behavioral.
Proceedings of the Thirteenth International Conference on Ubiquitous and Future Networks, 2022

2021
End-to-End Secure IoT Node Provisioning.
J. Commun., 2021

Comparison of RISC-V and transport triggered architectures for a postquantum cryptography application.
Turkish J. Electr. Eng. Comput. Sci., 2021

System-Level, Model-Based Power Estimation of IoT Nodes.
Proceedings of the 7th IEEE World Forum on Internet of Things, 2021

Designing and Implementing Secure Automotive Network for Autonomous Cars.
Proceedings of the 29th Signal Processing and Communications Applications Conference, 2021

Model Based Design of Software Defined and Cognitive Radio and Implementation on an FPGA.
Proceedings of the 29th Signal Processing and Communications Applications Conference, 2021

An FPGA Implementation of a RISC-V Based SoC System for Image Processing Applications.
Proceedings of the 29th Signal Processing and Communications Applications Conference, 2021

Instruction Extension of RV32I and GCC Back End for Ascon Lightweight Cryptography Algorithm.
Proceedings of the 2021 IEEE International Conference on Omni-Layer Intelligent Systems, 2021

2020
Comparison of RISC-V and transport triggered architectures for a post-quantum cryptography application.
IACR Cryptol. ePrint Arch., 2020

Instruction Extension of an Open Source RV32IMC Core for NTRU Cryptosystem.
Proceedings of the European Conference on Circuit Theory and Design, 2020

2019
New lightweight mitigation techniques for RPL version number attacks.
Ad Hoc Networks, 2019

Energy Efficient Sensor Design and Implementation on FPGA by Using Open Source Processors.
Proceedings of the 27th Signal Processing and Communications Applications Conference, 2019

Side Channel Analysis Using EM Radiation of RSA Algorithm Implemented on Raspberry Pi.
Proceedings of the 2019 International Symposium on Networks, Computers and Communications, 2019

Average Power Consumption Estimation and Momentary Power Consumption Profile Generation of a Softcore Processor.
Proceedings of the 7th International Conference on Digital Information Processing and Communications, 2019

2018
Customizable embedded processor array for multimedia applications.
Integr., 2018

Model based node design methodology for secure IoT applications.
Proceedings of the 26th Signal Processing and Communications Applications Conference, 2018

Electromagnetic radiation analysis of implementation of RSA algorithm on a Raspberry Pi.
Proceedings of the 26th Signal Processing and Communications Applications Conference, 2018

2017
IoT in Action: Design and Implementation of a Building Evacuation Service.
J. Comput. Networks Commun., 2017

Design and implementation of an OpenRISC system-on-chip with an encryption peripheral.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

2016
Reliability analysis of MIPS-32 microprocessor register files designed with different fault tolerant techniques.
Proceedings of the 24th Signal Processing and Communication Application Conference, 2016

Implementation of an OpenRISC based SoC and Linux Kernel installation on FPGA.
Proceedings of the 24th Signal Processing and Communication Application Conference, 2016

RPL version number attacks: In-depth study.
Proceedings of the 2016 IEEE/IFIP Network Operations and Management Symposium, 2016

Backhaul infrastructures in building automation systems: Wired or wireless?
Proceedings of the 3rd International Symposium on Wireless Systems within the Conferences on Intelligent Data Acquisition and Advanced Computing Systems, 2016

2015
Creating test environment with UVM for SPI.
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

Implementation of a modem which transmits digital data on GSM voice channel.
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

Application specific processor design for DCT based applications.
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

Hardware / software codesign and implementation for secure NFC applications.
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

JPEG image Encryption via TEA algorithm.
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

Internet-of-Things security: Denial of service attacks.
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

Design of core blocks and implementation on a programmable logic controller for a train signalization system.
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

Fault tolerant register file design for MIPS AES-crypto microprocessor.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Data transmission via GSM voice channel for end to end security.
Proceedings of the IEEE 5th International Conference on Consumer Electronics - Berlin, 2015

2014
Analyzing and comparing the AES architectures for their power consumption.
J. Intell. Manuf., 2014

Image filtering processor and its applications.
Proceedings of the 2014 22nd Signal Processing and Communications Applications Conference (SIU), 2014

2013
Privacy-Friendly Authentication in RFID Systems: On Sublinear Protocols Based on Symmetric-Key Cryptography.
IEEE Trans. Mob. Comput., 2013

Reliability and security of arbiter-based physical unclonable function circuits.
Int. J. Commun. Syst., 2013

Design and implementation of a secure RFID system on FPGA.
Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013

Hardware/Software codesign for watermarking in DCT domain.
Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013

Reed-solomon decoder hardware implementation for DVB-S receiver.
Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013

Implementation of a secure RFID protocol.
Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013

System level design of scalable encryption algorithm by using CoWare.
Proceedings of the International Conference on Computer, 2013

2011
Implementation of a PUF Circuit on a FPGA.
Proceedings of the 4th IFIP International Conference on New Technologies, 2011

Architectures for Fast Modular Multiplication.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2009
Differential power analysis attack considering decoupling capacitance effect.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008
Hardware implementation of an elliptic curve processor over GF(p) with Montgomery modular multiplier.
Int. J. Embed. Syst., 2008

FPGA Implementation of an Elliptic Curve Cryptosystem over GF(3^m).
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Differential Power Analysis resistant hardware implementation of the RSA cryptosystem.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Low-cost implementations of NTRU for pervasive security.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

2007
Differential power and electromagnetic attacks on a FPGA implementation of elliptic curve cryptosystems.
Comput. Electr. Eng., 2007

Power Analysis Resistant Hardware Implementations of AES.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2004
An FPGA Implementation of a Montgomery Multiplier Over GF(2^m).
Comput. Artif. Intell., 2004

Power-Analysis Attack on an ASIC AES implementation.
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004

An FPGA implementation of an elliptic curve processor GF(2<sup>m</sup>).
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

Power Analysis Attacks Against FPGA Implementations of the DES.
Proceedings of the Field Programmable Logic and Application, 2004

Flexible Hardware Design for RSA and Elliptic Curve Cryptosystems.
Proceedings of the Topics in Cryptology, 2004

Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?
Proceedings of the Cryptographic Hardware and Embedded Systems, 2004

2003
Hardware architectures for public key cryptography.
Integr., 2003

Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Power-Analysis Attacks on an FPGA - First Experimental Results.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2003

Hardware Implementation of an Elliptic Curve Processor over GF(p).
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

1999
Modeling Bit Multiplication Blocks for DSP Applications Using VHDL.
Proceedings of the 25th EUROMICRO '99 Conference, 1999


  Loading...